[X86][CodeGen] Add base trig intrinsic lowerings #96222
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farzonl
requested review from
bogner,
RKSimon,
llvm-beanz,
topperc and
efriedma-quic
llvmbot
added
backend:X86
llvm:globalisel
llvm:SelectionDAG
|
@llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-llvm-globalisel Author: Farzon Lotfi (farzonl) ChangesThis change is an implementation of #87367 investigation on supporting IEEE math operations as intrinsics. This change adds constraint intrinsics and some lowering cases for The x86 lowering is going to be done in three pr changes with this being the first. The constraint intrinsics is also going to be in multiple parts, but just 2. Patch is 159.57 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/96222.diff 33 Files Affected:
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 9a0f73e4d6d86..416bd95a91130 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -26476,6 +26476,219 @@ This function returns the tangent of the specified operand, returning the
same values as the libm ``tan`` functions would, and handles error
conditions in the same way.
+'``llvm.experimental.constrained.asin``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+::
+
+ declare <type>
+ @llvm.experimental.constrained.asin(<type> <op1>,
+ metadata <rounding mode>,
+ metadata <exception behavior>)
+
+Overview:
+"""""""""
+
+The '``llvm.experimental.constrained.asin``' intrinsic returns the arcsine of the
+first operand.
+
+Arguments:
+""""""""""
+
+The first argument and the return type are floating-point numbers of the same
+type.
+
+The second and third arguments specify the rounding mode and exception
+behavior as described above.
+
+Semantics:
+""""""""""
+
+This function returns the arcsine of the specified operand, returning the
+same values as the libm ``asin`` functions would, and handles error
+conditions in the same way.
+
+
+'``llvm.experimental.constrained.acos``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+::
+
+ declare <type>
+ @llvm.experimental.constrained.acos(<type> <op1>,
+ metadata <rounding mode>,
+ metadata <exception behavior>)
+
+Overview:
+"""""""""
+
+The '``llvm.experimental.constrained.acos``' intrinsic returns the arccosine of the
+first operand.
+
+Arguments:
+""""""""""
+
+The first argument and the return type are floating-point numbers of the same
+type.
+
+The second and third arguments specify the rounding mode and exception
+behavior as described above.
+
+Semantics:
+""""""""""
+
+This function returns the arccosine of the specified operand, returning the
+same values as the libm ``acos`` functions would, and handles error
+conditions in the same way.
+
+
+'``llvm.experimental.constrained.atan``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+::
+
+ declare <type>
+ @llvm.experimental.constrained.atan(<type> <op1>,
+ metadata <rounding mode>,
+ metadata <exception behavior>)
+
+Overview:
+"""""""""
+
+The '``llvm.experimental.constrained.atan``' intrinsic returns the arctangent of the
+first operand.
+
+Arguments:
+""""""""""
+
+The first argument and the return type are floating-point numbers of the same
+type.
+
+The second and third arguments specify the rounding mode and exception
+behavior as described above.
+
+Semantics:
+""""""""""
+
+This function returns the arctangent of the specified operand, returning the
+same values as the libm ``atan`` functions would, and handles error
+conditions in the same way.
+
+'``llvm.experimental.constrained.sinh``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+::
+
+ declare <type>
+ @llvm.experimental.constrained.sinh(<type> <op1>,
+ metadata <rounding mode>,
+ metadata <exception behavior>)
+
+Overview:
+"""""""""
+
+The '``llvm.experimental.constrained.sinh``' intrinsic returns the hyperbolic sine of the
+first operand.
+
+Arguments:
+""""""""""
+
+The first argument and the return type are floating-point numbers of the same
+type.
+
+The second and third arguments specify the rounding mode and exception
+behavior as described above.
+
+Semantics:
+""""""""""
+
+This function returns the hyperbolic sine of the specified operand, returning the
+same values as the libm ``sinh`` functions would, and handles error
+conditions in the same way.
+
+
+'``llvm.experimental.constrained.cosh``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+::
+
+ declare <type>
+ @llvm.experimental.constrained.cosh(<type> <op1>,
+ metadata <rounding mode>,
+ metadata <exception behavior>)
+
+Overview:
+"""""""""
+
+The '``llvm.experimental.constrained.cosh``' intrinsic returns the hyperbolic cosine of the
+first operand.
+
+Arguments:
+""""""""""
+
+The first argument and the return type are floating-point numbers of the same
+type.
+
+The second and third arguments specify the rounding mode and exception
+behavior as described above.
+
+Semantics:
+""""""""""
+
+This function returns the hyperbolic cosine of the specified operand, returning the
+same values as the libm ``cosh`` functions would, and handles error
+conditions in the same way.
+
+
+'``llvm.experimental.constrained.tanh``' Intrinsic
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Syntax:
+"""""""
+
+::
+
+ declare <type>
+ @llvm.experimental.constrained.tanh(<type> <op1>,
+ metadata <rounding mode>,
+ metadata <exception behavior>)
+
+Overview:
+"""""""""
+
+The '``llvm.experimental.constrained.tanh``' intrinsic returns the hyperbolic tangent of the
+first operand.
+
+Arguments:
+""""""""""
+
+The first argument and the return type are floating-point numbers of the same
+type.
+
+The second and third arguments specify the rounding mode and exception
+behavior as described above.
+
+Semantics:
+""""""""""
+
+This function returns the hyperbolic tangent of the specified operand, returning the
+same values as the libm ``tanh`` functions would, and handles error
+conditions in the same way.
'``llvm.experimental.constrained.exp``' Intrinsic
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 9f8d3ded9b3c1..6da6bc9353142 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -1980,6 +1980,24 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
case Intrinsic::tan:
ISD = ISD::FTAN;
break;
+ case Intrinsic::asin:
+ ISD = ISD::FASIN;
+ break;
+ case Intrinsic::acos:
+ ISD = ISD::FACOS;
+ break;
+ case Intrinsic::atan:
+ ISD = ISD::FATAN;
+ break;
+ case Intrinsic::sinh:
+ ISD = ISD::FSINH;
+ break;
+ case Intrinsic::cosh:
+ ISD = ISD::FCOSH;
+ break;
+ case Intrinsic::tanh:
+ ISD = ISD::FTANH;
+ break;
case Intrinsic::exp:
ISD = ISD::FEXP;
break;
diff --git a/llvm/include/llvm/CodeGen/ISDOpcodes.h b/llvm/include/llvm/CodeGen/ISDOpcodes.h
index 6bb89fb58a296..128418daee27b 100644
--- a/llvm/include/llvm/CodeGen/ISDOpcodes.h
+++ b/llvm/include/llvm/CodeGen/ISDOpcodes.h
@@ -416,6 +416,12 @@ enum NodeType {
STRICT_FSIN,
STRICT_FCOS,
STRICT_FTAN,
+ STRICT_FASIN,
+ STRICT_FACOS,
+ STRICT_FATAN,
+ STRICT_FSINH,
+ STRICT_FCOSH,
+ STRICT_FTANH,
STRICT_FEXP,
STRICT_FEXP2,
STRICT_FLOG,
@@ -942,6 +948,12 @@ enum NodeType {
FSIN,
FCOS,
FTAN,
+ FASIN,
+ FACOS,
+ FATAN,
+ FSINH,
+ FCOSH,
+ FTANH,
FPOW,
FPOWI,
/// FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
diff --git a/llvm/include/llvm/IR/ConstrainedOps.def b/llvm/include/llvm/IR/ConstrainedOps.def
index a7b37c5cb204d..56304c377b839 100644
--- a/llvm/include/llvm/IR/ConstrainedOps.def
+++ b/llvm/include/llvm/IR/ConstrainedOps.def
@@ -69,8 +69,12 @@ CMP_INSTRUCTION(FCmp, 2, 0, experimental_constrained_fcmps, FSETCCS
// Theses are definitions for intrinsic functions, that are converted into
// constrained intrinsics.
//
+DAG_FUNCTION(acos, 1, 1, experimental_constrained_acos, FACOS)
+DAG_FUNCTION(asin, 1, 1, experimental_constrained_asin, FASIN)
+DAG_FUNCTION(atan, 1, 1, experimental_constrained_atan, FATAN)
DAG_FUNCTION(ceil, 1, 0, experimental_constrained_ceil, FCEIL)
DAG_FUNCTION(cos, 1, 1, experimental_constrained_cos, FCOS)
+DAG_FUNCTION(cosh, 1, 1, experimental_constrained_cosh, FCOSH)
DAG_FUNCTION(exp, 1, 1, experimental_constrained_exp, FEXP)
DAG_FUNCTION(exp2, 1, 1, experimental_constrained_exp2, FEXP2)
DAG_FUNCTION(floor, 1, 0, experimental_constrained_floor, FFLOOR)
@@ -94,8 +98,10 @@ DAG_FUNCTION(rint, 1, 1, experimental_constrained_rint, FRINT)
DAG_FUNCTION(round, 1, 0, experimental_constrained_round, FROUND)
DAG_FUNCTION(roundeven, 1, 0, experimental_constrained_roundeven, FROUNDEVEN)
DAG_FUNCTION(sin, 1, 1, experimental_constrained_sin, FSIN)
+DAG_FUNCTION(sinh, 1, 1, experimental_constrained_sinh, FSINH)
DAG_FUNCTION(sqrt, 1, 1, experimental_constrained_sqrt, FSQRT)
DAG_FUNCTION(tan, 1, 1, experimental_constrained_tan, FTAN)
+DAG_FUNCTION(tanh, 1, 1, experimental_constrained_tanh, FTANH)
DAG_FUNCTION(trunc, 1, 0, experimental_constrained_trunc, FTRUNC)
// This is definition for fmuladd intrinsic function, that is converted into
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index c7d383a5d0c0c..ae7b460c6e86a 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -1211,6 +1211,18 @@ let IntrProperties = [IntrInaccessibleMemOnly, IntrWillReturn, IntrStrictFP] in
llvm_anyint_ty,
llvm_metadata_ty,
llvm_metadata_ty ]>;
+ def int_experimental_constrained_asin : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
+ [ LLVMMatchType<0>,
+ llvm_metadata_ty,
+ llvm_metadata_ty ]>;
+ def int_experimental_constrained_acos : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
+ [ LLVMMatchType<0>,
+ llvm_metadata_ty,
+ llvm_metadata_ty ]>;
+ def int_experimental_constrained_atan : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
+ [ LLVMMatchType<0>,
+ llvm_metadata_ty,
+ llvm_metadata_ty ]>;
def int_experimental_constrained_sin : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
[ LLVMMatchType<0>,
llvm_metadata_ty,
@@ -1223,6 +1235,18 @@ let IntrProperties = [IntrInaccessibleMemOnly, IntrWillReturn, IntrStrictFP] in
[ LLVMMatchType<0>,
llvm_metadata_ty,
llvm_metadata_ty ]>;
+ def int_experimental_constrained_sinh : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
+ [ LLVMMatchType<0>,
+ llvm_metadata_ty,
+ llvm_metadata_ty ]>;
+ def int_experimental_constrained_cosh : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
+ [ LLVMMatchType<0>,
+ llvm_metadata_ty,
+ llvm_metadata_ty ]>;
+ def int_experimental_constrained_tanh : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
+ [ LLVMMatchType<0>,
+ llvm_metadata_ty,
+ llvm_metadata_ty ]>;
def int_experimental_constrained_pow : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ],
[ LLVMMatchType<0>,
LLVMMatchType<0>,
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.def b/llvm/include/llvm/IR/RuntimeLibcalls.def
index d8eab80656c06..89aaf6d1ad83f 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.def
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.def
@@ -202,6 +202,36 @@ HANDLE_LIBCALL(TAN_F64, "tan")
HANDLE_LIBCALL(TAN_F80, "tanl")
HANDLE_LIBCALL(TAN_F128,"tanl")
HANDLE_LIBCALL(TAN_PPCF128, "tanl")
+HANDLE_LIBCALL(SINH_F32, "sinhf")
+HANDLE_LIBCALL(SINH_F64, "sinh")
+HANDLE_LIBCALL(SINH_F80, "sinhl")
+HANDLE_LIBCALL(SINH_F128, "sinhl")
+HANDLE_LIBCALL(SINH_PPCF128, "sinhl")
+HANDLE_LIBCALL(COSH_F32, "coshf")
+HANDLE_LIBCALL(COSH_F64, "cosh")
+HANDLE_LIBCALL(COSH_F80, "coshl")
+HANDLE_LIBCALL(COSH_F128, "coshl")
+HANDLE_LIBCALL(COSH_PPCF128, "coshl")
+HANDLE_LIBCALL(TANH_F32, "tanhf")
+HANDLE_LIBCALL(TANH_F64, "tanh")
+HANDLE_LIBCALL(TANH_F80, "tanhl")
+HANDLE_LIBCALL(TANH_F128,"tanhl")
+HANDLE_LIBCALL(TANH_PPCF128, "tanhl")
+HANDLE_LIBCALL(ASIN_F32, "asinf")
+HANDLE_LIBCALL(ASIN_F64, "asin")
+HANDLE_LIBCALL(ASIN_F80, "asinl")
+HANDLE_LIBCALL(ASIN_F128, "asinl")
+HANDLE_LIBCALL(ASIN_PPCF128, "asinl")
+HANDLE_LIBCALL(ACOS_F32, "acosf")
+HANDLE_LIBCALL(ACOS_F64, "acos")
+HANDLE_LIBCALL(ACOS_F80, "acosl")
+HANDLE_LIBCALL(ACOS_F128, "acosl")
+HANDLE_LIBCALL(ACOS_PPCF128, "acosl")
+HANDLE_LIBCALL(ATAN_F32, "atanf")
+HANDLE_LIBCALL(ATAN_F64, "atan")
+HANDLE_LIBCALL(ATAN_F80, "atanl")
+HANDLE_LIBCALL(ATAN_F128,"atanl")
+HANDLE_LIBCALL(ATAN_PPCF128, "atanl")
HANDLE_LIBCALL(SINCOS_F32, nullptr)
HANDLE_LIBCALL(SINCOS_F64, nullptr)
HANDLE_LIBCALL(SINCOS_F80, nullptr)
diff --git a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
index 560d3b434d07d..fbe551e1be911 100644
--- a/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
+++ b/llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
@@ -149,6 +149,12 @@ def : GINodeEquiv<G_FCEIL, fceil>;
def : GINodeEquiv<G_FCOS, fcos>;
def : GINodeEquiv<G_FSIN, fsin>;
def : GINodeEquiv<G_FTAN, ftan>;
+def : GINodeEquiv<G_FACOS, facos>;
+def : GINodeEquiv<G_FASIN, fasin>;
+def : GINodeEquiv<G_FATAN, fatan>;
+def : GINodeEquiv<G_FCOSH, fcosh>;
+def : GINodeEquiv<G_FSINH, fsinh>;
+def : GINodeEquiv<G_FTANH, ftanh>;
def : GINodeEquiv<G_FABS, fabs>;
def : GINodeEquiv<G_FSQRT, fsqrt>;
def : GINodeEquiv<G_FFLOOR, ffloor>;
diff --git a/llvm/include/llvm/Target/TargetSelectionDAG.td b/llvm/include/llvm/Target/TargetSelectionDAG.td
index 8cbf98cd58ca9..9a4fad2d41a21 100644
--- a/llvm/include/llvm/Target/TargetSelectionDAG.td
+++ b/llvm/include/llvm/Target/TargetSelectionDAG.td
@@ -515,6 +515,12 @@ def fsqrt : SDNode<"ISD::FSQRT" , SDTFPUnaryOp>;
def fsin : SDNode<"ISD::FSIN" , SDTFPUnaryOp>;
def fcos : SDNode<"ISD::FCOS" , SDTFPUnaryOp>;
def ftan : SDNode<"ISD::FTAN" , SDTFPUnaryOp>;
+def fasin : SDNode<"ISD::FASIN" , SDTFPUnaryOp>;
+def facos : SDNode<"ISD::FACOS" , SDTFPUnaryOp>;
+def fatan : SDNode<"ISD::FATAN" , SDTFPUnaryOp>;
+def fsinh : SDNode<"ISD::FSINH" , SDTFPUnaryOp>;
+def fcosh : SDNode<"ISD::FCOSH" , SDTFPUnaryOp>;
+def ftanh : SDNode<"ISD::FTANH" , SDTFPUnaryOp>;
def fexp2 : SDNode<"ISD::FEXP2" , SDTFPUnaryOp>;
def fexp10 : SDNode<"ISD::FEXP10" , SDTFPUnaryOp>;
def fpow : SDNode<"ISD::FPOW" , SDTFPBinOp>;
@@ -570,6 +576,18 @@ def strict_fcos : SDNode<"ISD::STRICT_FCOS",
SDTFPUnaryOp, [SDNPHasChain]>;
def strict_ftan : SDNode<"ISD::STRICT_FTAN",
SDTFPUnaryOp, [SDNPHasChain]>;
+def strict_fasin : SDNode<"ISD::STRICT_FASIN",
+ SDTFPUnaryOp, [SDNPHasChain]>;
+def strict_facos : SDNode<"ISD::STRICT_FACOS",
+ SDTFPUnaryOp, [SDNPHasChain]>;
+def strict_fatan : SDNode<"ISD::STRICT_FATAN",
+ SDTFPUnaryOp, [SDNPHasChain]>;
+def strict_fsinh : SDNode<"ISD::STRICT_FSINH",
+ SDTFPUnaryOp, [SDNPHasChain]>;
+def strict_fcosh : SDNode<"ISD::STRICT_FCOSH",
+ SDTFPUnaryOp, [SDNPHasChain]>;
+def strict_ftanh : SDNode<"ISD::STRICT_FTANH",
+ SDTFPUnaryOp, [SDNPHasChain]>;
def strict_fexp2 : SDNode<"ISD::STRICT_FEXP2",
SDTFPUnaryOp, [SDNPHasChain]>;
def strict_fpow : SDNode<"ISD::STRICT_FPOW",
@@ -1528,6 +1546,24 @@ def any_fcos : PatFrags<(ops node:$src),
def any_ftan : PatFrags<(ops node:$src),
[(strict_ftan node:$src),
(ftan node:$src)]>;
+def any_fasin : PatFrags<(ops node:$src),
+ [(strict_fasin node:$src),
+ (fasin node:$src)]>;
+def any_facos : PatFrags<(ops node:$src),
+ [(strict_facos node:$src),
+ (facos node:$src)]>;
+def any_fatan : PatFrags<(ops node:$src),
+ [(strict_fatan node:$src),
+ (fatan node:$src)]>;
+def any_fsinh : PatFrags<(ops node:$src),
+ [(strict_fsinh node:$src),
+ (fsinh node:$src)]>;
+def any_fcosh : PatFrags<(ops node:$src),
+ [(strict_fcosh node:$src),
+ (fcosh node:$src)]>;
+def any_ftanh : PatFrags<(ops node:$src),
+ [(strict_ftanh node:$src),
+ (ftanh node:$src)]>;
def any_fexp2 : PatFrags<(ops node:$src),
[(strict_fexp2 node:$src),
(fexp2 node:$src)]>;
diff --git a/llvm/lib/Analysis/VectorUtils.cpp b/llvm/lib/Analysis/VectorUtils.cpp
index 30728ed587509..369230d25a98a 100644
--- a/llvm/lib/Analysis/VectorUtils.cpp
+++ b/llvm/lib/Analysis/VectorUtils.cpp
@@ -69,6 +69,12 @@ bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {
case Intrinsic::sin:
case Intrinsic::cos:
case Intrinsic::tan:
+ case Intrinsic::asin:
+ case Intrinsic::acos:
+ case Intrinsic::atan:
+ case Intrinsic::sinh:
+ case Intrinsic::cosh:
+ case Intrinsic::tanh:
case Intrinsic::exp:
case Intrinsic::exp2:
case Intrinsic::log:
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 223d1eae58874..bca5c7e5ec622 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -451,6 +451,18 @@ static RTLIB::Libcall getRTLibDesc(unsigned Opcode, unsigned Size) {
RTLIBCASE(COS_F);
case TargetOpcode::G_FTAN:
RTLIBCASE(TAN_F);
+ case TargetOpcode::G_FASIN:
+ RTLIBCASE(ASIN_F);
+ case TargetOpcode::G_FACOS:
+ RTLIBCASE(ACOS_F);
+ case TargetOpcode::G_FATAN:
+ RTLIBCASE(ATAN_F);
+ case TargetOpcode::G_FSINH:
+ RTLIBCASE(SINH_F);
+ case TargetOpcode::G_FCOSH:
+ RTLIBCASE(COSH_F);
+ case TargetOpcode::G_FTANH:
+ RTLIBCASE(TANH_F);
case TargetOpcode::G_FLOG10:
RTLIBCASE(LOG10_F);
case TargetOpcode::G_FLOG:
@@ -1040,6 +1052,12 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
case TargetOpcode::G_FCOS:
case TargetOpcode::G_FSIN:
case TargetOpcode::G_FTAN:
+ case TargetOpcode::G_FACOS:
+ case TargetOpcode::G_FASIN:
+ case TargetOpcode::G_FATAN:
+ case TargetOpcode::G_FCOSH:
+ case TargetOpcode::G_FSINH:
+ case TargetOpcode::G_FTANH:
case TargetOpcode::G_FLOG10:
case TargetOpcode::G_FLOG:
case TargetOpcode::G_FLOG2:
@@ -2897,6 +2915,12 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
...
[truncated]
|
farzonl
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@efriedma-quic I put the constraint intrinsic changes in this pr, let me know if you think it should be in a follow on pr. |
topperc
reviewed
Jun 24, 2024
topperc
reviewed
Jun 24, 2024
This change adds constraint intrinsics and some lowering cases. The only x86 specific change was for f80. The x86 lowering is going to be done in three pr changes with this being the first. A second PR will be put up for Loop Vectorizing and then SLPVectorizer. The constraint intrinsics is also going to be in multiple parts, but just 2. This part covers just the llvm specific changes, part2 will cover clang specifc changes and legalization for backends than have special legalization requirements like aarch64 and wasm.
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@RKSimon @topperc, @efriedma-quic could I get another review when you get a chance? |
|
This looks good to me. |
|
@efriedma-quic are you happy with the constraint intrinsic side of things? Also @topperc thank you for the lgtm, could you also click the aprove button? |
efriedma-quic
approved these changes
Jul 11, 2024
bogner
approved these changes
Jul 11, 2024
aaryanshukla
pushed a commit
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that referenced
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Jul 14, 2024
This change is an implementation of llvm#87367 investigation on supporting IEEE math operations as intrinsics. Which was discussed in this RFC: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 This change adds constraint intrinsics and some lowering cases for `acos`, `asin`, `atan`, `cosh`, `sinh`, and `tanh`. The only x86 specific change was for f80. llvm#70079 llvm#70080 llvm#70081 llvm#70083 llvm#70084 llvm#95966 The x86 lowering is going to be done in three pr changes with this being the first. A second PR will be put up for Loop Vectorizing and then SLPVectorizer. The constraint intrinsics is also going to be in multiple parts, but just 2. This part covers just the llvm specific changes, part2 will cover clang specifc changes and legalization for backends than have special legalization requirements like aarch64 and wasm.
farzonl
added a commit
that referenced
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Jul 29, 2024
#99383) This change is part 2 x86 Loop Vectorization of : #96222 It also has veclib call loop vectorization hence the test cases in `llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll` finally the last pr missed tests for `llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll` and `llvm/test/CodeGen/X86/vec-libcalls.ll` so added those aswell. No evidence was found for arc and hyperbolic trig glibc vector math functions https://github.com/lattera/glibc/blob/master/sysdeps/x86/fpu/bits/math-vector.h so no new `_ZGVbN2v_*` and `_ZGVdN4v_*` . So no new tests in `llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll` Also no new svml and no new tests to: `llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll` There was not enough evidence that there were svml arc and hyperbolic trig vector implementations, Documentation was scarces so looked at test cases in [numpy](https://github.com/numpy/SVML/blob/32bf2a98420762a63ab418aaa0a7d6e17eb9627a/linux/avx512/svml_z0_acos_d_la.s#L8). Someone with more experience with svml should investigate. ## Note amd libm doesn't have a vector hyperbolic sine api hence why youi might notice there are no tests for `sinh`. ## History This change is part of #87367 investigation on supporting IEEE math operations as intrinsics. Which was discussed in this RFC: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 This change adds loop vectorization for `acos`, `asin`, `atan`, `cosh`, `sinh`, and `tanh`. resolves #70079 resolves #70080 resolves #70081 resolves #70083 resolves #70084 resolves #95966
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This change is part of this proposal: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 Based on example PR llvm#96222 and fix PR llvm#101268, with some differences due to 2-arg intrinsic and intermediate refactor (RuntimeLibCalls.cpp). - Add llvm.experimental.constrained.atan2 - Intrinsics.td, ConstrainedOps.def, LangRef.rst - Add to ISDOpcodes.h and TargetSelectionDAG.td, connect to intrinsic in BasicTTIImpl.h, and LibFunc_ in SelectionDAGBuilder.cpp, and map generic op in SelectionDAGCompat.td - Update LegalizeDAG.cpp, LegalizeFloatTypes.cpp, LegalizeVectorOps.cpp, and LegalizeVectorTypes.cpp - Update isKnownNeverNaN in SelectionDAG.cpp - Update SelectionDAGDumper.cpp - Update libcalls - RuntimeLibcalls.def, RuntimeLibcalls.cpp, LegalizerHelper.cpp - Update isKnownNeverNaN for generic opcode in GlobalISel/Utils.cpp - TargetLoweringBase.cpp - Expand for vectors, promote f16 - X86ISelLowering.cpp - Expand f80, promote f32 to f64 for MSVC
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This change is part of this proposal: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 Based on example PR llvm#96222 and fix PR llvm#101268, with some differences due to 2-arg intrinsic and intermediate refactor (RuntimeLibCalls.cpp). - Add llvm.experimental.constrained.atan2 - Intrinsics.td, ConstrainedOps.def, LangRef.rst - Add to ISDOpcodes.h and TargetSelectionDAG.td, connect to intrinsic in BasicTTIImpl.h, and LibFunc_ in SelectionDAGBuilder.cpp, and map generic op in SelectionDAGCompat.td - Update LegalizeDAG.cpp, LegalizeFloatTypes.cpp, LegalizeVectorOps.cpp, and LegalizeVectorTypes.cpp - Update isKnownNeverNaN in SelectionDAG.cpp - Update SelectionDAGDumper.cpp - Update libcalls - RuntimeLibcalls.def, RuntimeLibcalls.cpp, LegalizerHelper.cpp - Update isKnownNeverNaN for generic opcode in GlobalISel/Utils.cpp - TargetLoweringBase.cpp - Expand for vectors, promote f16 - X86ISelLowering.cpp - Expand f80, promote f32 to f64 for MSVC
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This change is part of this proposal: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 Based on example PR llvm#96222 and fix PR llvm#101268, with some differences due to 2-arg intrinsic and intermediate refactor (RuntimeLibCalls.cpp). - Add llvm.experimental.constrained.atan2 - Intrinsics.td, ConstrainedOps.def, LangRef.rst - Add to ISDOpcodes.h and TargetSelectionDAG.td, connect to intrinsic in BasicTTIImpl.h, and LibFunc_ in SelectionDAGBuilder.cpp, and map generic op in SelectionDAGCompat.td - Update LegalizeDAG.cpp, LegalizeFloatTypes.cpp, LegalizeVectorOps.cpp, and LegalizeVectorTypes.cpp - Update isKnownNeverNaN in SelectionDAG.cpp - Update SelectionDAGDumper.cpp - Update libcalls - RuntimeLibcalls.def, RuntimeLibcalls.cpp, LegalizerHelper.cpp - Update isKnownNeverNaN for generic opcode in GlobalISel/Utils.cpp - TargetLoweringBase.cpp - Expand for vectors, promote f16 - X86ISelLowering.cpp - Expand f80, promote f32 to f64 for MSVC
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This change is part of this proposal: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 Based on example PR llvm#96222 and fix PR llvm#101268, with some differences due to 2-arg intrinsic and intermediate refactor (RuntimeLibCalls.cpp). - Add llvm.experimental.constrained.atan2 - Intrinsics.td, ConstrainedOps.def, LangRef.rst - Add to ISDOpcodes.h and TargetSelectionDAG.td, connect to intrinsic in BasicTTIImpl.h, and LibFunc_ in SelectionDAGBuilder.cpp, and map generic op in SelectionDAGCompat.td - Update LegalizeDAG.cpp, LegalizeFloatTypes.cpp, LegalizeVectorOps.cpp, and LegalizeVectorTypes.cpp - Update isKnownNeverNaN in SelectionDAG.cpp - Update SelectionDAGDumper.cpp - Update libcalls - RuntimeLibcalls.def, RuntimeLibcalls.cpp, LegalizerHelper.cpp - Update isKnownNeverNaN for generic opcode in GlobalISel/Utils.cpp - TargetLoweringBase.cpp - Expand for vectors, promote f16 - X86ISelLowering.cpp - Expand f80, promote f32 to f64 for MSVC
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This change is part of this proposal: https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294 Based on example PR #96222 and fix PR #101268, with some differences due to 2-arg intrinsic and intermediate refactor (RuntimeLibCalls.cpp). - Add llvm.experimental.constrained.atan2 - Intrinsics.td, ConstrainedOps.def, LangRef.rst - Add to ISDOpcodes.h and TargetSelectionDAG.td, connect to intrinsic in BasicTTIImpl.h, and LibFunc_ in SelectionDAGBuilder.cpp - Update LegalizeDAG.cpp, LegalizeFloatTypes.cpp, LegalizeVectorOps.cpp, and LegalizeVectorTypes.cpp - Update isKnownNeverNaN in SelectionDAG.cpp - Update SelectionDAGDumper.cpp - Update libcalls - RuntimeLibcalls.def, RuntimeLibcalls.cpp - TargetLoweringBase.cpp - Expand for vectors, promote f16 - X86ISelLowering.cpp - Expand f80, promote f32 to f64 for MSVC Part 4 for Implement the atan2 HLSL Function #70096.
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When updating X86SelLowering.cpp based on llvm#96222, it was known that a needed change was missing which was merged later in llvm#101268. However, the corresponding test update to `fp-strict-libcalls-msvc32.ll` was missed. This change rectifies that oversight. Part of: Part of: Implement the atan2 HLSL Function llvm#70096.
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When updating X86SelLowering.cpp for atan2, based on #96222, it was known that a needed change was missing which was merged later in #101268. However, the corresponding test update to `fp-strict-libcalls-msvc32.ll` was missed. This change rectifies that oversight. This also adds a missing label to the tanh test, since it's produced by update_llc_test_checks.py Part of: Implement the atan2 HLSL Function #70096.
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This change is an implementation of #87367 investigation on supporting IEEE math operations as intrinsics.
Which was discussed in this RFC:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
This change adds constraint intrinsics and some lowering cases for
acos,asin,atan,cosh,sinh, andtanh.The only x86 specific change was for f80.
#70079
#70080
#70081
#70083
#70084
#95966
The x86 lowering is going to be done in three pr changes with this being the first.
A second PR will be put up for Loop Vectorizing and then SLPVectorizer.
The constraint intrinsics is also going to be in multiple parts, but just 2.
This part covers just the llvm specific changes, part2 will cover clang
specifc changes and legalization for backends than have special legalization
requirements like aarch64 and wasm.