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[SYCL] Add clang support for FPGA kernel attribute scheduler_target_fmax_mhz #2511
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Is there any CodeGen changes are coming?
I guess if the attribute is intended to give some information to FPGA backend, we need to add some info to IR as well.
Yes. Added a test to show the appropriate IR changes per spec. |
I am scared by looking at all these random attributes landing... |
Not applicable when attribute is not enabled for OpenCL Handle OpenCL case in a separate pull request if needed
Some of the tuning knobs make the most sense as attributes because of where they're attached, but many could also make sense as library abstractions. Everything defined as an attribute so far is a hint, and not a functional assertion / semantic modifier. So it can be argued that these are all pure C++, in that it's safe to ignore them as is usual for unhandled attributes (usually with a warning). Anything that cannot be ignored has intentionally not been defined as an attribute, as far as I know. Library abstractions are sometimes more invasive than attributes, for example to modify a property of kernel callable. Many of the options to solve that are uglier/more invasive than an attribute. So there is some balance between the two, but a lot of attributes have been defined at this point. That said, I agree that we should push more to the "library abstraction" style for alignment with C++ philosophy, and for a variety of other reasons. It's important that you're drawing attention to this @keryell. This has revived discussion amongst the people defining these tuning attributes. Can triSYCL help to motivate a use case where one of these FPGA-specific tuning knobs would be used to target an FPGA, and you would handle without a modified compiler stack (as a lib-only implementation)? That would help to make this case. |
Add assert and change test run command
Thank you for participating to this discussion. |
Please look also to our contribution to mitigate the kitchen sink approach to attributes: https://reviews.llvm.org/D88645 |
* sycl: [SYCL] Fix test failure due to size discrepancy in 32 and 64 bit environment (intel#2594) [BuildBot] Linux GPU driver uplift to 20.39.17972 (intel#2600) [SYCL][NFC] Remove cyclic dependency in headers (intel#2601) [SYCL][Doc] Fix Sphinx docs index (intel#2599) [SYCL][PI][L0] Add an assert to piEnqueueKernelLaunch() when the GlobalWorkOffset!=0 (intel#2593) [SYCL][Driver] Turn on -spirv-allow-extra-diexpressions option (intel#2578) [SYCL] Serialize queue related PI API in the Level-Zero plugin (intel#2588) Added missing math APIs for devicelib. (intel#2558) [SYCL][DOC] Fix path to FPGA device selector (intel#2563) [SYCL][CUDA] Add basic sub-group functionality (intel#2587) [SYCL] Add specialization constant feature design doc. (intel#2572) [SYCL] Expand release lit test to CPU and ACC (intel#2589) [SYCL] Add clang support for FPGA kernel attribute scheduler_target_fmax_mhz (intel#2511) [SYCL][ESIMD] Fixed compiler crash in LowerESIMDVecArg pass (intel#2556)
[[intelfpga::scheduler_target_fmax_mhz(N)]] applies to a device function/lambda function. Indicates that the kernel should be pipelined so as to achieve the specified target clock frequency (Fmax) of N MHz. The argument N may be a template parameter. Limits of N are [0,1048576]; This attribute should be ignored for the FPGA emulator device.
This patch should