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@webconn webconn commented Jul 5, 2024

rebase of #207

H616 core can be clocked at 288 MHz on CPU_PLL without adjusting PLL frequency divider which the kernel doesn't support at the moment.

Running at 288 MHz compared to 488 MHz saves some 0.1W of power.
Update critical temperature to match T507 industrial temperature range.

For thermal throttling we use step-wise throttling optimized for at least 10 years chip lifetime at full load. As the lifetime is limited not only by temperature by also by core voltage, we disallow high core voltage opps at higher core temperatures.
add debug, statistics interfaces and also make trips writable from userspace
@webconn webconn mentioned this pull request Jul 5, 2024
@webconn webconn merged commit 52a2722 into feature/wb8-6.8 Jul 5, 2024
@webconn webconn deleted the feature/SOFT-3860-rebase1 branch July 5, 2024 09:19
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3 participants