[Hexagon] Add missing patterns to select PFALSE and PTRUE

[iajbar]

Fixes #134659

[llvmbot]

@llvm/pr-subscribers-backend-hexagon

Author: Ikhlas Ajbar (iajbar)

Changes

Fixes #134659

---

Full diff: https://github.com/llvm/llvm-project/pull/138712.diff

2 Files Affected:

• (modified) llvm/lib/Target/Hexagon/HexagonPatterns.td (+5)
• (added) llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll (+29)

diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td
index dd2a5a34afcc0..0d872b556d801 100644
--- a/llvm/lib/Target/Hexagon/HexagonPatterns.td
+++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td
@@ -109,7 +109,12 @@ def pfalse: PatFrag<(ops), (HexagonPFALSE)>;
 def pnot:   PatFrag<(ops node:$Pu), (xor node:$Pu, ptrue)>;
 
 def: Pat<(v8i1 (HexagonPFALSE)), (C2_tfrrp (A2_tfrsi (i32 0)))>;
+def: Pat<(v4i1 (HexagonPFALSE)), (C2_tfrrp (A2_tfrsi (i32 0)))>;
+def: Pat<(v2i1 (HexagonPFALSE)), (C2_tfrrp (A2_tfrsi (i32 0)))>;
+
 def: Pat<(v8i1 (HexagonPTRUE)), (C2_tfrrp (A2_tfrsi (i32 -1)))>;
+def: Pat<(v4i1 (HexagonPTRUE)), (C2_tfrrp (A2_tfrsi (i32 -1)))>;
+def: Pat<(v2i1 (HexagonPTRUE)), (C2_tfrrp (A2_tfrsi (i32 -1)))>;
 
 def valign: PatFrag<(ops node:$Vt, node:$Vs, node:$Ru),
                     (HexagonVALIGN node:$Vt, node:$Vs, node:$Ru)>;
diff --git a/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll b/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll
new file mode 100644
index 0000000000000..c0904b8b4fdd6
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll
@@ -0,0 +1,29 @@
+; RUN: llc -march=hexagon -debug-only=isel 2>&1 < %s - | FileCheck %s
+
+; CHECK: [[R0:%[0-9]+]]:intregs = A2_tfrsi 0
+; CHECK-NEXT: predregs = C2_tfrrp killed [[R0]]:intregs
+
+define fastcc i16 @test(ptr %0, { <4 x i32>, <4 x i1> } %1, <4 x i1> %2) {
+Entry:
+  %3 = alloca [16 x i8], i32 0, align 16
+  %4 = alloca [16 x i8], i32 0, align 16
+  store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %4, align 16
+  store <4 x i32> <i32 5, i32 6, i32 7, i32 8>, ptr %3, align 16
+  %5 = load <4 x i32>, ptr %4, align 16
+  %6 = load <4 x i32>, ptr %3, align 16
+  %7 = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> %5, <4 x i32> %6)
+  %8 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> %2)
+  br i1 %8, label %OverflowFail, label %OverflowOk
+
+OverflowFail:                                     ; preds = %Entry
+  store volatile i32 0, ptr null, align 4
+    unreachable
+
+OverflowOk:                                       ; preds = %Entry
+  %9 = extractvalue { <4 x i32>, <4 x i1> } %7, 0
+    store <4 x i32> %9, ptr %0, align 16
+      ret i16 0
+      }
+
+declare { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32>, <4 x i32>) #0
+declare i1 @llvm.vector.reduce.or.v4i1(<4 x i1>) #0

[dyung]

Was this change ever reviewed/approved before it was submitted?

[h-vetinari]

This landed in v20.1.5 via #138770, and seems to cause a test failure when building llvm:

******************** TEST 'LLVM :: CodeGen/Hexagon/isel/pfalse-v4i1.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 1: $SRC_DIR/build/bin/llc -march=hexagon -debug-only=isel 2>&1 < $SRC_DIR/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll - | $SRC_DIR/build/bin/FileCheck $SRC_DIR/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll
+ $SRC_DIR/build/bin/llc -march=hexagon -debug-only=isel -
+ $SRC_DIR/build/bin/FileCheck $SRC_DIR/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll
$SRC_DIR/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll:3:10: error: CHECK: expected string not found in input
; CHECK: [[R0:%[0-9]+]]:intregs = A2_tfrsi 0
         ^
<stdin>:1:1: note: scanning from here
llc: Unknown command line argument '-debug-only=isel'. Try: '$SRC_DIR/build/bin/llc --help'
^
<stdin>:1:22: note: possible intended match here
llc: Unknown command line argument '-debug-only=isel'. Try: '$SRC_DIR/build/bin/llc --help'
                     ^

Input file: <stdin>
Check file: $SRC_DIR/llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll

-dump-input=help explains the following input dump.

Input was:
<<<<<<
           1: llc: Unknown command line argument '-debug-only=isel'. Try: '$SRC_DIR/build/bin/llc --help' 
check:3'0     X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
check:3'1                          ?                                                                                                                                         possible intended match
           2: llc: Did you mean '--debug-pass=isel'? 
check:3'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>>>>

[svs-quic]

We will need to backport dyung@340d199 to release branch 20.

[amy-kwan]

I also agree with a backport of the test case fix into the release/20.x branch.

/cherry-pick 194a4a3

[llvmbot]

/pull-request #140176

[h-vetinari]

I backported 194a4a3 for the build in our distribution and can confirm that it fixed the failure: conda-forge/llvmdev-feedstock@c41f96d

[dyung]

I also agree with a backport of the test case fix into the release/20.x branch.

/cherry-pick 194a4a3

FYI, I've already requested it to be ported to the release branch at #139822. It is just awaiting merging.

[llvmbot]

Failed to cherry-pick: 194a4a3

https://github.com/llvm/llvm-project/actions/runs/15060425251

Please manually backport the fix and push it to your github fork. Once this is done, please create a pull request