[Hexagon] `Cannot select: t89: v4i1 = HexagonISD::PFALSE` #134659

alexrp · 2025-04-07T14:34:35Z

target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown-linux4.19.0-musl"

define fastcc i16 @"math.test.vector integer addition.S.doTheTest"(ptr %0, { <4 x i32>, <4 x i1> } %1, <4 x i1> %2) {
Entry:
  %3 = alloca [16 x i8], i32 0, align 16
  %4 = alloca [16 x i8], i32 0, align 16
  store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %4, align 16
  store <4 x i32> <i32 5, i32 6, i32 7, i32 8>, ptr %3, align 16
  %5 = load <4 x i32>, ptr %4, align 16
  %6 = load <4 x i32>, ptr %3, align 16
  %7 = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> %5, <4 x i32> %6)
  %8 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> %2)
  br i1 %8, label %OverflowFail, label %OverflowOk

OverflowFail:                                     ; preds = %Entry
  store volatile i32 0, ptr null, align 4
  unreachable

OverflowOk:                                       ; preds = %Entry
  %9 = extractvalue { <4 x i32>, <4 x i1> } %7, 0
  store <4 x i32> %9, ptr %0, align 16
  ret i16 0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32>, <4 x i32>) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i1 @llvm.vector.reduce.or.v4i1(<4 x i1>) #0

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

❯ llc --version | head -n2
LLVM (http://llvm.org/):
  LLVM version 20.1.2
❯ llc reduced.ll
LLVM ERROR: Cannot select: t89: v4i1 = HexagonISD::PFALSE
In function: math.test.vector integer addition.S.doTheTest
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: llc reduced.ll
1.      Running pass 'Function Pass Manager' on module 'reduced.ll'.
2.      Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on function '@"math.test.vector integer addition.S.doTheTest"'
 #0 0x000075e1ae580e02 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:803:3
 #1 0x000075e1ae57e7af llvm::sys::RunSignalHandlers() /home/alexrp/Source/llvm-project/llvm/lib/Support/Signals.cpp:105:20
 #2 0x000075e1ae57eb3d SignalHandler(int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:415:1
 #3 0x000075e1ace45330 (/lib/x86_64-linux-gnu/libc.so.6+0x45330)
 #4 0x000075e1ace9eb2c __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #5 0x000075e1ace9eb2c __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #6 0x000075e1ace9eb2c pthread_kill ./nptl/pthread_kill.c:89:10
 #7 0x000075e1ace4527e raise ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x000075e1ace288ff abort ./stdlib/abort.c:81:7
 #9 0x000075e1ae293cf9 (/opt/llvm-20/bin/../lib/libLLVM.so.20.1+0xc93cf9)
#10 0x000075e1af1aef9c llvm::SDNode::getOperand(unsigned int) const /home/alexrp/Source/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGNodes.h:993:5
#11 0x000075e1af1aef9c llvm::SDNode::getConstantOperandVal(unsigned int) const /home/alexrp/Source/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1724:61
#12 0x000075e1af1aef9c llvm::SelectionDAGISel::CannotYetSelect(llvm::SDNode*) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:4424:44
#13 0x000075e1af1b77d3 llvm::SelectionDAG::getEntryNode() const /home/alexrp/Source/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:581:41
#14 0x000075e1af1b77d3 llvm::SelectionDAGISel::SelectCodeCommon(llvm::SDNode*, unsigned char const*, unsigned int) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:4014:42
#15 0x000075e1af1ab031 llvm::SmallVectorTemplateCommon<llvm::SDNode*, void>::isSmall() const /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/SmallVector.h:143:39
#16 0x000075e1af1ab031 llvm::SmallVectorImpl<llvm::SDNode*>::~SmallVectorImpl() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/SmallVector.h:603:23
#17 0x000075e1af1ab031 llvm::SmallVector<llvm::SDNode*, 4u>::~SmallVector() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/SmallVector.h:1203:3
#18 0x000075e1af1ab031 llvm::SelectionDAGISel::DoInstructionSelection() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1354:5
#19 0x000075e1af1bbfc7 llvm::TimeRegion::~TimeRegion() /home/alexrp/Source/llvm-project/llvm/include/llvm/Support/Timer.h:160:9
#20 0x000075e1af1bbfc7 llvm::NamedRegionTimer::~NamedRegionTimer() /home/alexrp/Source/llvm-project/llvm/include/llvm/Support/Timer.h:168:8
#21 0x000075e1af1bbfc7 llvm::SelectionDAGISel::CodeGenAndEmitDAG() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1123:3
#22 0x000075e1af1c0555 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1904:33
#23 0x000075e1af1c1c19 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:616:22
#24 0x000075e1b1fcab34 llvm::HexagonDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h:47:17
#25 0x000075e1af1b2547 llvm::OptLevelChanger::~OptLevelChanger() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:269:11
#26 0x000075e1af1b2547 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:376:1
#27 0x000075e1af1b2547 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:347:6
#28 0x000075e1aeafa58f llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:94:33
#29 0x000075e1ae7453a4 llvm::FPPassManager::runOnFunction(llvm::Function&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1416:7
#30 0x000075e1ae7455c1 llvm::ilist_detail::node_base_prevnext<llvm::ilist_node_base<true, void>, true>::getNext() const /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node_base.h:42:38
#31 0x000075e1ae7455c1 llvm::ilist_node_impl<llvm::ilist_detail::node_options<llvm::Function, true, false, void, false, void>>::getNext() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node.h:117:66
#32 0x000075e1ae7455c1 llvm::ilist_iterator<llvm::ilist_detail::node_options<llvm::Function, true, false, void, false, void>, false, false>::operator++() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:187:25
#33 0x000075e1ae7455c1 llvm::FPPassManager::runOnModule(llvm::Module&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1451:22
#34 0x000075e1ae745e0d runOnModule /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1528:7
#35 0x000075e1ae745e0d llvm::legacy::PassManagerImpl::run(llvm::Module&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:539:55
#36 0x00005bb459a949df compileModule(char**, llvm::LLVMContext&) /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:753:34
#37 0x00005bb459a89057 main /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:411:35
#38 0x000075e1ace2a1ca __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#39 0x000075e1ace2a28b call_init ./csu/../csu/libc-start.c:128:20
#40 0x000075e1ace2a28b __libc_start_main ./csu/../csu/libc-start.c:347:5
#41 0x00005bb459a89de5 _start (/opt/llvm-20/bin/llc+0x12de5)

llvmbot · 2025-04-07T14:34:58Z

@llvm/issue-subscribers-backend-hexagon

Author: Alex Rønne Petersen (alexrp)

```llvm target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048" target triple = "hexagon-unknown-linux4.19.0-musl"

define fastcc i16 @"math.test.vector integer addition.S.doTheTest"(ptr %0, { <4 x i32>, <4 x i1> } %1, <4 x i1> %2) {
Entry:
%3 = alloca [16 x i8], i32 0, align 16
%4 = alloca [16 x i8], i32 0, align 16
store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %4, align 16
store <4 x i32> <i32 5, i32 6, i32 7, i32 8>, ptr %3, align 16
%5 = load <4 x i32>, ptr %4, align 16
%6 = load <4 x i32>, ptr %3, align 16
%7 = call { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32> %5, <4 x i32> %6)
%8 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> %2)
br i1 %8, label %OverflowFail, label %OverflowOk

OverflowFail: ; preds = %Entry
store volatile i32 0, ptr null, align 4
unreachable

OverflowOk: ; preds = %Entry
%9 = extractvalue { <4 x i32>, <4 x i1> } %7, 0
store <4 x i32> %9, ptr %0, align 16
ret i16 0
}

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare { <4 x i32>, <4 x i1> } @llvm.sadd.with.overflow.v4i32(<4 x i32>, <4 x i32>) #0

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i1 @llvm.vector.reduce.or.v4i1(<4 x i1>) #0

attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }


```console
❯ llc --version | head -n2
LLVM (http://llvm.org/):
  LLVM version 20.1.2
❯ llc reduced.ll
LLVM ERROR: Cannot select: t89: v4i1 = HexagonISD::PFALSE
In function: math.test.vector integer addition.S.doTheTest
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: llc reduced.ll
1.      Running pass 'Function Pass Manager' on module 'reduced.ll'.
2.      Running pass 'Hexagon DAG-&gt;DAG Pattern Instruction Selection' on function '@"math.test.vector integer addition.S.doTheTest"'
 #<!-- -->0 0x000075e1ae580e02 llvm::sys::PrintStackTrace(llvm::raw_ostream&amp;, int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:803:3
 #<!-- -->1 0x000075e1ae57e7af llvm::sys::RunSignalHandlers() /home/alexrp/Source/llvm-project/llvm/lib/Support/Signals.cpp:105:20
 #<!-- -->2 0x000075e1ae57eb3d SignalHandler(int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:415:1
 #<!-- -->3 0x000075e1ace45330 (/lib/x86_64-linux-gnu/libc.so.6+0x45330)
 #<!-- -->4 0x000075e1ace9eb2c __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #<!-- -->5 0x000075e1ace9eb2c __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #<!-- -->6 0x000075e1ace9eb2c pthread_kill ./nptl/pthread_kill.c:89:10
 #<!-- -->7 0x000075e1ace4527e raise ./signal/../sysdeps/posix/raise.c:27:6
 #<!-- -->8 0x000075e1ace288ff abort ./stdlib/abort.c:81:7
 #<!-- -->9 0x000075e1ae293cf9 (/opt/llvm-20/bin/../lib/libLLVM.so.20.1+0xc93cf9)
#<!-- -->10 0x000075e1af1aef9c llvm::SDNode::getOperand(unsigned int) const /home/alexrp/Source/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGNodes.h:993:5
#<!-- -->11 0x000075e1af1aef9c llvm::SDNode::getConstantOperandVal(unsigned int) const /home/alexrp/Source/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1724:61
#<!-- -->12 0x000075e1af1aef9c llvm::SelectionDAGISel::CannotYetSelect(llvm::SDNode*) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:4424:44
#<!-- -->13 0x000075e1af1b77d3 llvm::SelectionDAG::getEntryNode() const /home/alexrp/Source/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h:581:41
#<!-- -->14 0x000075e1af1b77d3 llvm::SelectionDAGISel::SelectCodeCommon(llvm::SDNode*, unsigned char const*, unsigned int) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:4014:42
#<!-- -->15 0x000075e1af1ab031 llvm::SmallVectorTemplateCommon&lt;llvm::SDNode*, void&gt;::isSmall() const /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/SmallVector.h:143:39
#<!-- -->16 0x000075e1af1ab031 llvm::SmallVectorImpl&lt;llvm::SDNode*&gt;::~SmallVectorImpl() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/SmallVector.h:603:23
#<!-- -->17 0x000075e1af1ab031 llvm::SmallVector&lt;llvm::SDNode*, 4u&gt;::~SmallVector() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/SmallVector.h:1203:3
#<!-- -->18 0x000075e1af1ab031 llvm::SelectionDAGISel::DoInstructionSelection() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1354:5
#<!-- -->19 0x000075e1af1bbfc7 llvm::TimeRegion::~TimeRegion() /home/alexrp/Source/llvm-project/llvm/include/llvm/Support/Timer.h:160:9
#<!-- -->20 0x000075e1af1bbfc7 llvm::NamedRegionTimer::~NamedRegionTimer() /home/alexrp/Source/llvm-project/llvm/include/llvm/Support/Timer.h:168:8
#<!-- -->21 0x000075e1af1bbfc7 llvm::SelectionDAGISel::CodeGenAndEmitDAG() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1123:3
#<!-- -->22 0x000075e1af1c0555 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1904:33
#<!-- -->23 0x000075e1af1c1c19 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:616:22
#<!-- -->24 0x000075e1b1fcab34 llvm::HexagonDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h:47:17
#<!-- -->25 0x000075e1af1b2547 llvm::OptLevelChanger::~OptLevelChanger() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:269:11
#<!-- -->26 0x000075e1af1b2547 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:376:1
#<!-- -->27 0x000075e1af1b2547 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:347:6
#<!-- -->28 0x000075e1aeafa58f llvm::MachineFunctionPass::runOnFunction(llvm::Function&amp;) (.part.0) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:94:33
#<!-- -->29 0x000075e1ae7453a4 llvm::FPPassManager::runOnFunction(llvm::Function&amp;) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1416:7
#<!-- -->30 0x000075e1ae7455c1 llvm::ilist_detail::node_base_prevnext&lt;llvm::ilist_node_base&lt;true, void&gt;, true&gt;::getNext() const /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node_base.h:42:38
#<!-- -->31 0x000075e1ae7455c1 llvm::ilist_node_impl&lt;llvm::ilist_detail::node_options&lt;llvm::Function, true, false, void, false, void&gt;&gt;::getNext() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node.h:117:66
#<!-- -->32 0x000075e1ae7455c1 llvm::ilist_iterator&lt;llvm::ilist_detail::node_options&lt;llvm::Function, true, false, void, false, void&gt;, false, false&gt;::operator++() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:187:25
#<!-- -->33 0x000075e1ae7455c1 llvm::FPPassManager::runOnModule(llvm::Module&amp;) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1451:22
#<!-- -->34 0x000075e1ae745e0d runOnModule /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1528:7
#<!-- -->35 0x000075e1ae745e0d llvm::legacy::PassManagerImpl::run(llvm::Module&amp;) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:539:55
#<!-- -->36 0x00005bb459a949df compileModule(char**, llvm::LLVMContext&amp;) /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:753:34
#<!-- -->37 0x00005bb459a89057 main /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:411:35
#<!-- -->38 0x000075e1ace2a1ca __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#<!-- -->39 0x000075e1ace2a28b call_init ./csu/../csu/libc-start.c:128:20
#<!-- -->40 0x000075e1ace2a28b __libc_start_main ./csu/../csu/libc-start.c:347:5
#<!-- -->41 0x00005bb459a89de5 _start (/opt/llvm-20/bin/llc+0x12de5)

alexrp · 2025-04-07T14:35:03Z

FYI @androm3da we're hitting this in Zig's behavior tests.

androm3da · 2025-04-07T16:03:13Z

This somewhat resembles #118879 I think. But I'll let @iajbar comment - do we need to track both issues independently? The symptoms aren't quite identical.

Most of the failures are: * llvm/llvm-project#118879 * llvm/llvm-project#134659 But some are also miscompilations leading to wrong results. I'm not going to investigate the latter further until all the backend crashes have been resolved.

See: * llvm/llvm-project#118879 * llvm/llvm-project#134659

Most of the failures are: * llvm/llvm-project#118879 * llvm/llvm-project#134659 But some are also miscompilations leading to wrong results. I'm not going to investigate the latter further until all the backend crashes have been resolved.

See: * llvm/llvm-project#118879 * llvm/llvm-project#134659

androm3da · 2025-05-01T15:48:51Z

This somewhat resembles #118879 I think. But I'll let @iajbar comment - do we need to track both issues independently? The symptoms aren't quite identical.

Ok, that's moot now. #118879 is fixed and this bug remains.

iajbar · 2025-05-01T17:41:49Z

We are aware of this case, and we are working on supporting in Hexagon:
v4i1 = HexagonISD::PFALSE
v4i1 = HexagonISD::PTRUE
v2i1 = HexagonISD::PFALSE
v2i1 = HexagonISD::PTRUE

iajbar · 2025-05-06T21:53:19Z

/cherry-pick 57e8899

llvmbot · 2025-05-06T21:59:18Z

/pull-request #138770

Fixes llvm#134659

Fixes llvm#134659 (cherry picked from commit 57e8899)

alexrp added backend:Hexagon crash-on-valid labels Apr 7, 2025

alexrp mentioned this issue Apr 7, 2025

Tier System: hexagon-linux ziglang/zig#21652

Open

7 tasks

alexrp added a commit to alexrp/zig that referenced this issue Apr 7, 2025

std: Disable some vector-related tests for hexagon.

ccd0454

See: * llvm/llvm-project#118879 * llvm/llvm-project#134659

alexrp added a commit to alexrp/zig that referenced this issue Apr 11, 2025

std: Disable some vector-related tests for hexagon.

01b5e8b

See: * llvm/llvm-project#118879 * llvm/llvm-project#134659

iajbar mentioned this issue May 6, 2025

[Hexagon] Add missing patterns to select PFALSE and PTRUE #138712

Merged

iajbar self-assigned this May 6, 2025

iajbar closed this as completed in #138712 May 6, 2025

iajbar closed this as completed in 57e8899 May 6, 2025

iajbar added this to the LLVM 20.X Release milestone May 6, 2025

github-project-automation bot moved this to Needs Triage in LLVM Release Status May 6, 2025

github-project-automation bot added this to LLVM Release Status May 6, 2025

iajbar removed this from the LLVM 20.X Release milestone May 6, 2025

EugeneZelenko added the release:backport label May 6, 2025

iajbar added this to the LLVM 20.X Release milestone May 6, 2025

GeorgeARM pushed a commit to GeorgeARM/llvm-project that referenced this issue May 7, 2025

[Hexagon] Add missing patterns to select PFALSE and PTRUE (llvm#138712)

11ab49d

Fixes llvm#134659

swift-ci pushed a commit to swiftlang/llvm-project that referenced this issue May 9, 2025

[Hexagon] Add missing patterns to select PFALSE and PTRUE (llvm#138712)

ae97a56

Fixes llvm#134659 (cherry picked from commit 57e8899)

tstellar moved this from Needs Triage to Done in LLVM Release Status May 10, 2025

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[Hexagon] `Cannot select: t89: v4i1 = HexagonISD::PFALSE` #134659

[Hexagon] `Cannot select: t89: v4i1 = HexagonISD::PFALSE` #134659

alexrp commented Apr 7, 2025

llvmbot commented Apr 7, 2025

alexrp commented Apr 7, 2025

androm3da commented Apr 7, 2025

androm3da commented May 1, 2025

iajbar commented May 1, 2025

iajbar commented May 6, 2025

llvmbot commented May 6, 2025

[Hexagon] Cannot select: t89: v4i1 = HexagonISD::PFALSE #134659

[Hexagon] Cannot select: t89: v4i1 = HexagonISD::PFALSE #134659

Comments

alexrp commented Apr 7, 2025

llvmbot commented Apr 7, 2025

alexrp commented Apr 7, 2025

androm3da commented Apr 7, 2025

androm3da commented May 1, 2025

iajbar commented May 1, 2025

iajbar commented May 6, 2025

llvmbot commented May 6, 2025

[Hexagon] `Cannot select: t89: v4i1 = HexagonISD::PFALSE` #134659

[Hexagon] `Cannot select: t89: v4i1 = HexagonISD::PFALSE` #134659