[MIPS64] Failure to remove random NOPs in the middle of instructions

[GabrielRavier]

int f(int a, int b)
{
    return (a ^ b) | ~(a | b);
}

When compiled with -O3 -target mips64el -fomit-frame-pointer, LLVM outputs:

f(int, int): # @f(int, int)
  and $1, $5, $4
  sll $1, $1, 0
  not $1, $1
  jr $ra
  sll $2, $1, 0

whereas GCC manages (with -O3):

f(int, int):
  and $4,$4,$5
  jr $31
  nor $2,$0,$4

The sll instructions seem entirely unnecessary as they are just nops from what I understand, and they don't seem required for any particular reason (using -target mipsel instead of -target mips64el also gets them removed, so this seems quite specific to 64-bit MIPS)

[llvmbot]

@llvm/issue-subscribers-backend-mips

Author: Gabriel Ravier (GabrielRavier)

```cpp int f(int a, int b) { return (a ^ b) | ~(a | b); } ```

When compiled with -O3 -target mips64el -fomit-frame-pointer, LLVM outputs:

f(int, int): # @<!-- -->f(int, int)
  and $1, $5, $4
  sll $1, $1, 0
  not $1, $1
  jr $ra
  sll $2, $1, 0

whereas GCC manages (with -O3):

f(int, int):
  and $4,$4,$5
  jr $31
  nor $2,$0,$4

The sll instructions seem entirely unnecessary as they are just nops from what I understand, and they don't seem required for any particular reason (using -target mipsel instead of -target mips64el also gets them removed, so this seems quite specific to 64-bit MIPS)

[topperc]

Based on the final SelectionDAG, it appears those sll instructions the truncate and the sign_extend

Optimized legalized selection DAG: %bb.0 'f:entry'                               
SelectionDAG has 16 nodes:                                                       
  t0: ch,glue = EntryToken                                                       
              t7: i64,ch = CopyFromReg t0, Register:i64 %1                       
            t8: i64 = AssertSext t7, ValueType:ch:i32                            
              t2: i64,ch = CopyFromReg t0, Register:i64 %0                       
            t4: i64 = AssertSext t2, ValueType:ch:i32                            
          t17: i64 = and t8, t4                                                  
        t18: i32 = truncate t17                                                  
      t12: i32 = xor t18, Constant:i32<-1>                                       
    t13: i64 = sign_extend t12                                                   
  t15: ch,glue = CopyToReg t0, Register:i64 $v0_64, t13                          
  t16: ch = MipsISD::Ret t15, Register:i64 $v0_64, t15:1