[MIPS]Optimize (sign_extend (xor (trunc X), imm)) to xor

Optimize '$dst = sign_extend (xor (trunc $src), imm)'
to '$dst = sign_extend (trunc (xor $src, imm))'.

Fix llvm#99783

Author: anbbna

llvm/lib/Target/Mips/MipsISelLowering.cpp

@@ -517,7 +517,8 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
   setOperationAction(ISD::TRAP, MVT::Other, Legal);
 
   setTargetDAGCombine({ISD::SDIVREM, ISD::UDIVREM, ISD::SELECT, ISD::AND,
-                       ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext, ISD::SHL});
+                       ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext, ISD::SHL,
+                       ISD::SIGN_EXTEND});
 
   if (Subtarget.isGP64bit())
     setMaxAtomicSizeInBitsSupported(64);
@@ -1210,6 +1211,30 @@ static SDValue performSHLCombine(SDNode *N, SelectionDAG &DAG,
                      DAG.getConstant(SMSize, DL, MVT::i32));
 }
 
+static SDValue performSignExtendCombine(SDNode *N, SelectionDAG &DAG,
+                                        TargetLowering::DAGCombinerInfo &DCI,
+                                        const MipsSubtarget &Subtarget) {
+  SDValue N0 = N->getOperand(0);
+  EVT VT = N->getValueType(0);
+
+  //  $dst = sign_extend (xor (trunc $src), imm)
+  //  => $dst = sign_extend (trunc (xor $src, imm))
+  if (N0.getOpcode() == ISD::XOR &&
+      N0.getOperand(0).getOpcode() == ISD::TRUNCATE &&
+      N0.getOperand(1).getOpcode() == ISD::Constant) {
+    SDValue TruncateOperand = N0.getOperand(0).getOperand(0);
+    APInt Mask = N0.getConstantOperandAPInt(1).zext(VT.getSizeInBits());
+
+    SDValue Xor = DAG.getNode(ISD::XOR, SDLoc(N), VT, TruncateOperand,
+                              DAG.getTargetConstant(Mask, SDLoc(N), VT));
+    SDValue Truncate =
+        DAG.getNode(ISD::TRUNCATE, SDLoc(N), N0->getValueType(0), Xor);
+    return DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N), VT, Truncate);
+  }
+
+  return SDValue();
+}
+
 SDValue  MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
   const {
   SelectionDAG &DAG = DCI.DAG;
@@ -1235,6 +1260,8 @@ SDValue  MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
     return performSHLCombine(N, DAG, DCI, Subtarget);
   case ISD::SUB:
     return performSUBCombine(N, DAG, DCI, Subtarget);
+  case ISD::SIGN_EXTEND:
+    return performSignExtendCombine(N, DAG, DCI, Subtarget);
   }
 
   return SDValue();