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arch-aarch6464-bit ARM64-bit ARMarch-arm32-bit ARM32-bit ARMarch-avr8-bit AVR8-bit AVRarch-nvptxNVIDIA PTXNVIDIA PTXarch-powerpc32-bit and 64-bit Power ISA32-bit and 64-bit Power ISAarch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-Varch-s390x64-bit IBM z/Architecture64-bit IBM z/Architecturearch-sparc32-bit and 64-bit SPARC32-bit and 64-bit SPARCarch-wasm32-bit and 64-bit WebAssembly32-bit and 64-bit WebAssemblyarch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.os-aixIBM AIXIBM AIXos-hurdGNU HurdGNU Hurdos-uefios-zosIBM z/OSIBM z/OSstandard libraryThis issue involves writing Zig code for the standard library.This issue involves writing Zig code for the standard library.zig ccZig as a drop-in C compiler featureZig as a drop-in C compiler feature
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Description
- Consider switching
*-uefi-*
targets touefi
instead ofwindows
for LLVM 21+ #21630 - RISC-V Extension Changes coming to LLVM 22 #25013
- [PowerPC][AIX] Specify correct ABI alignment for double llvm/llvm-project#144673 (data layout change)
- [ARM] support -mlong-calls -fPIC on arm32 #39970 llvm/llvm-project#147313
- [PowerPC] Change
half
to use soft promotion rather thanPromoteFloat
llvm/llvm-project#152632 - [AVR] Change
half
to usesoftPromoteHalfType
llvm/llvm-project#152783 - [SPARC] Change
half
to use soft promotion rather thanPromoteFloat
llvm/llvm-project#152727 - [WebAssembly] Change
half
to use soft promotion rather thanPromoteFloat
llvm/llvm-project#152833 - [llvm-objcopy][libObject] Add RISC-V big-endian support llvm/llvm-project#146913
- [clang][SPARC] Pass 16-aligned structs with the correct alignment in CC llvm/llvm-project#155829
- Default stack alignment of X86 Hurd to 16 bytes llvm/llvm-project#158454
- [ELF][LLDB] Add an nvsass triple llvm/llvm-project#159459
- [Driver][Hurd] Add AArch64 and RISCV64 support llvm/llvm-project#157212
- [Driver] Enable __float128 support on X86 on Hurd llvm/llvm-project#160045
- [AArch64] Improve host feature detection. llvm/llvm-project#160410
- [RISCV] Add basic Mach-O triple support. llvm/llvm-project#141682
-
Lines 355 to 356 in bb79c85
// .{ .cpu_arch = .xtensa, .os_tag = .freestanding, .abi = .none }, // .{ .cpu_arch = .xtensa, .os_tag = .linux, .abi = .none }, -
Line 242 in bb79c85
// .{ .cpu_arch = .s390x, .os_tag = .zos, .abi = .none }, - beb25b0 & 35d2b1e
- f90548e & e7f1624
Previous upgrade: #23176
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arch-aarch6464-bit ARM64-bit ARMarch-arm32-bit ARM32-bit ARMarch-avr8-bit AVR8-bit AVRarch-nvptxNVIDIA PTXNVIDIA PTXarch-powerpc32-bit and 64-bit Power ISA32-bit and 64-bit Power ISAarch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-Varch-s390x64-bit IBM z/Architecture64-bit IBM z/Architecturearch-sparc32-bit and 64-bit SPARC32-bit and 64-bit SPARCarch-wasm32-bit and 64-bit WebAssembly32-bit and 64-bit WebAssemblyarch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.os-aixIBM AIXIBM AIXos-hurdGNU HurdGNU Hurdos-uefios-zosIBM z/OSIBM z/OSstandard libraryThis issue involves writing Zig code for the standard library.This issue involves writing Zig code for the standard library.zig ccZig as a drop-in C compiler featureZig as a drop-in C compiler feature