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86a9890
add simd crate feature to wasmi_core crate
Robbepop Mar 16, 2025
5c7a578
implement V128 skeleton
Robbepop Mar 16, 2025
53e526f
rename IntoLane and Lane (appending 's')
Robbepop Mar 16, 2025
769727a
add docs to most (or all) simd.rs definitions
Robbepop Mar 16, 2025
a8c0ae9
add note comments to unsafe transmutes
Robbepop Mar 16, 2025
bc87e4c
implement SIMD splat instructions
Robbepop Mar 16, 2025
d437879
add extract_lane SIMD APIs
Robbepop Mar 17, 2025
64d3c18
expect dead_code warnings
Robbepop Mar 17, 2025
1deaba6
remove empty line
Robbepop Mar 17, 2025
d8b74ad
remove non-existing extract_lane APIs
Robbepop Mar 17, 2025
5952ab1
add replace_lane SIMD APIs
Robbepop Mar 17, 2025
9336f6b
add V128 From impls for bytes and i128
Robbepop Mar 17, 2025
9c15875
add SIMD binary integer math ops
Robbepop Mar 17, 2025
f532fed
add unary integer math SIMD ops
Robbepop Mar 17, 2025
5e55754
add SIMD integer abs ops
Robbepop Mar 17, 2025
2181ab5
add unsigned SIMD lanes types
Robbepop Mar 17, 2025
43635a3
use unsigned SIMD types where applicable for now
Robbepop Mar 17, 2025
0b134b3
improve docs for IntoLanes and IntoLaneIdx
Robbepop Mar 17, 2025
42cc71c
add helper IntoLanewiseWidening trait
Robbepop Mar 17, 2025
ca36c58
clean-up API design
Robbepop Mar 17, 2025
62dea1c
add SIMD ext_mul_{low,high} ops
Robbepop Mar 17, 2025
01cf099
generate docs for new SIMD extmul ops
Robbepop Mar 17, 2025
431ee78
add extadd_pairwise SIMD ops
Robbepop Mar 17, 2025
7dece0a
implement add_sat and sub_sat SIMD ops
Robbepop Mar 17, 2025
2f3c753
add i16x8_q15mulr_sat_s SIMD operation
Robbepop Mar 17, 2025
edd0ea9
add SIMD integer min and max operations
Robbepop Mar 17, 2025
9edb2aa
add SIMD avgr_u ops
Robbepop Mar 17, 2025
2f9f0c0
implement Wasm shift SIMD ops
Robbepop Mar 17, 2025
c4268a8
add bitwise SIMD ops
Robbepop Mar 17, 2025
448cb31
add v128.bitselect SIMD operation
Robbepop Mar 17, 2025
d4bbd34
add SIMD i8x16.popcnt instruction
Robbepop Mar 17, 2025
40b4219
add i32x4.dot_i16x8_s SIMD operation
Robbepop Mar 17, 2025
500d904
implement SIMD reduce ops
Robbepop Mar 17, 2025
707150d
add SIMD comparison instructions
Robbepop Mar 17, 2025
b7e9afc
add unary float SIMD instructions
Robbepop Mar 18, 2025
de36135
move op! macro to top of file
Robbepop Mar 18, 2025
c2bd961
add float binary SIMD instructions
Robbepop Mar 18, 2025
78bf871
Merge branch 'main' into rf-implement-simd-proposal
Robbepop Mar 19, 2025
f992a54
add lanewise unary cast SIMD ops
Robbepop Mar 19, 2025
cf4b5bb
rewrite i32x4.dot_i16x8_s in terms of other fns
Robbepop Mar 19, 2025
c4956ad
add FromNarrow trait and impls
Robbepop Mar 19, 2025
983c271
add V128 convenience methods for FromNarrow
Robbepop Mar 19, 2025
45d3969
rewrite extmul ops in terms of FromNarrow APIs
Robbepop Mar 19, 2025
d275444
rewrite extadd ops in terms of FromNarrow APIs
Robbepop Mar 19, 2025
9d80b48
add new extend SIMD ops
Robbepop Mar 19, 2025
7390796
remove old widening and narrowing APIs
Robbepop Mar 19, 2025
055b579
no longer silence dead_code warnings
Robbepop Mar 19, 2025
9317bbd
add missing docs for convenience method
Robbepop Mar 19, 2025
92e7193
refactor unary widen SIMD ops generation
Robbepop Mar 19, 2025
e953c9f
add more widen-low SIMD ops
Robbepop Mar 19, 2025
df55aac
fix signedness of some SIMD extend-{low,high} ops
Robbepop Mar 19, 2025
8ab2f53
rename macro
Robbepop Mar 19, 2025
e89fa00
add narrowing-low-high SIMD ops
Robbepop Mar 19, 2025
1b47827
rename FromNarrow method
Robbepop Mar 19, 2025
37a3b83
fix i32x4_dot_i16x8_s SIMD impl
Robbepop Mar 19, 2025
9344e29
re-format code
Robbepop Mar 19, 2025
3c5b067
re-write from_low_high impl
Robbepop Mar 19, 2025
9184272
add narrowing low-or SIMD ops
Robbepop Mar 19, 2025
127d340
convert all V128 methods to functions in the simd module
Robbepop Mar 19, 2025
4ec17dc
align docs with others
Robbepop Mar 19, 2025
32e5ced
align more docs
Robbepop Mar 19, 2025
718655e
replace register128 feature with simd feature
Robbepop Mar 19, 2025
3c9ecf7
move load/store stuff into memory.rs module
Robbepop Mar 19, 2025
83230b6
redesign WrapInto and ExtendInto macros
Robbepop Mar 19, 2025
cd11fe2
Merge branch 'main' into rf-implement-simd-proposal
Robbepop Mar 19, 2025
ba56cb9
remove ImmByte since it is unused
Robbepop Mar 19, 2025
aa72956
rename OutOfBoundsLaneId
Robbepop Mar 19, 2025
48c4d4a
merge macro invocations
Robbepop Mar 19, 2025
8055b3d
re-design extmul macros
Robbepop Mar 19, 2025
68da596
refactor macros
Robbepop Mar 19, 2025
52e266e
refactor memory submodule
Robbepop Mar 19, 2025
630481a
Merge branch 'main' into rf-implement-simd-proposal
Robbepop Mar 19, 2025
22cd724
add v128 store instructions
Robbepop Mar 19, 2025
b6b355b
add v128.load evaluators
Robbepop Mar 20, 2025
63601ae
add LaneIndex trait
Robbepop Mar 20, 2025
29ea33b
add more IntoLaneIdx trait impls
Robbepop Mar 20, 2025
f23072c
add impls for v128.load{32,64}_zero
Robbepop Mar 20, 2025
8f01d8a
update docs
Robbepop Mar 20, 2025
f375a29
add v128.loadN_splat instruction impls
Robbepop Mar 20, 2025
62f2895
add v128.loadN_lane SIMD instruction impls
Robbepop Mar 20, 2025
1ac376a
update docs error sections
Robbepop Mar 20, 2025
c5895d0
implement V128 load_mxn_{s,u} ops
Robbepop Mar 20, 2025
fd2d37a
configure Cargo to generate simd docs
Robbepop Mar 20, 2025
c80fcb0
remove value128 crate feature
Robbepop Mar 20, 2025
d25333b
fix avgr SIMD instructions and clippy warnings
Robbepop Mar 20, 2025
d4d95eb
rename some FromNarrow methods to please clippy
Robbepop Mar 20, 2025
b9c5446
add SIMD shuffle and swizzle ops
Robbepop Mar 20, 2025
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11 changes: 7 additions & 4 deletions crates/core/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -21,12 +21,15 @@ downcast-rs = { version = "2.0.1", default-features = false, features = ["sync"]
default = ["std"]
# Use `no-default-features` for a `no_std` build.
std = ["downcast-rs/std"]

# Enable this to use 128-bit untyped values.
# Enables the Wasm `simd` proposal.
#
# This mainly affects the `UntypedVal` type since it acts as Wasmi's register cell type.
value128 = []
# This also changes the size of `UntypedVal` from 64-bit to 128-bit
# which may have significant impact on performance and memory usage.
simd = []

[package.metadata.cargo-udeps.ignore]
# cargo-udeps cannot detect that libm is used for no_std targets only.
normal = ["libm"]

[package.metadata.docs.rs]
all-features = true
3 changes: 3 additions & 0 deletions crates/core/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,9 @@ mod untyped;
mod value;
pub mod wasm;

#[cfg(feature = "simd")]
pub mod simd;

extern crate alloc;
#[cfg(feature = "std")]
extern crate std;
Expand Down
22 changes: 15 additions & 7 deletions crates/core/src/memory.rs
Original file line number Diff line number Diff line change
Expand Up @@ -50,17 +50,25 @@ macro_rules! impl_extend_into {
};
}
impl_extend_into! {
// unsigned -> unsigned
impl ExtendInto<u16> for u8;
impl ExtendInto<u32> for u16;
impl ExtendInto<u64> for u32;

// signed -> signed
impl ExtendInto<i16> for i8;
impl ExtendInto<i32> for i8;
impl ExtendInto<i32> for u8;
impl ExtendInto<i32> for i16;
impl ExtendInto<i32> for u16;
impl ExtendInto<i64> for i8;
impl ExtendInto<i64> for u8;
impl ExtendInto<i32> for i16;
impl ExtendInto<i64> for i16;
impl ExtendInto<i64> for u16;
impl ExtendInto<i64> for i32;

// unsigned -> signed
impl ExtendInto<i32> for u8;
impl ExtendInto<i64> for u8;
impl ExtendInto<i32> for u16;
impl ExtendInto<i64> for u16;
impl ExtendInto<i64> for u32;
impl ExtendInto<u64> for u32;
}

/// Allows to efficiently load bytes from `memory` into a buffer.
Expand Down Expand Up @@ -140,7 +148,7 @@ macro_rules! impl_little_endian_convert_primitive {
)*
};
}
impl_little_endian_convert_primitive!(u8, u16, u32, u64, i8, i16, i32, i64, f32, f64);
impl_little_endian_convert_primitive!(u8, u16, u32, u64, u128, i8, i16, i32, i64, i128, f32, f64);

/// Calculates the effective address of a linear memory access.
///
Expand Down
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