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[Hardware][TPU][V1] Multi-LoRA implementation for the V1 TPU backend #14238
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Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
…` to be called with infinities Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Right now I see there's a |
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My suggestion is still to get this merged but wait until TPU has decent performances before enabling it.
There are a number of changes which don't impact the "TPU area" directly, in both logic and interface in LoRa specific code which have been reviewed and still provide value in setting up the landscape.
The follow up PRs can focus on changes to TpuModelRunner and pallas+punica.
if vllm_config.lora_config is not None: | ||
raise NotImplementedError( | ||
"""The V0 TPU backend doesn't support LoRA serving, please try \ | ||
V1 by setting VLLM_USE_V1=1""") | ||
|
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I think this is misleading if we decide not to enable it just yet.
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Yep I'll undo that there for now.
Wrt to the CI errors I see here:
|
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Thanks @NickLucche I think that's fixed the TPU tests. I've merged from main but the GPU side errors are still there. What's really fun is that they're errors with the Triton kernels which shouldn't be affected by this at all |
Signed-off-by: Akshat Tripathi <[email protected]>
This pull request has merge conflicts that must be resolved before it can be |
Signed-off-by: Akshat Tripathi <[email protected]>
@classmethod | ||
def get_infinity_values(cls, dtype: torch.dtype) -> Tuple[float, float]: | ||
""" | ||
Return the platform specific values for (-inf, inf) | ||
""" | ||
return float("-inf"), float("inf") |
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Why do we ignore the dtype here?
This pull request has merge conflicts that must be resolved before it can be |
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
Signed-off-by: Akshat Tripathi <[email protected]>
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LGTM, thanks for your great contribution!
The TPU CI test failure seems irrelevant to this PR because it also happens in 621ca2c
…llm-project#14238) Signed-off-by: Akshat Tripathi <[email protected]> Signed-off-by: Chengji Yao <[email protected]> Co-authored-by: Chengji Yao <[email protected]> Signed-off-by: 汪志鹏 <[email protected]>
…llm-project#14238) Signed-off-by: Akshat Tripathi <[email protected]> Signed-off-by: Chengji Yao <[email protected]> Co-authored-by: Chengji Yao <[email protected]> Signed-off-by: Mu Huai <[email protected]>
…llm-project#14238) Signed-off-by: Akshat Tripathi <[email protected]> Signed-off-by: Chengji Yao <[email protected]> Co-authored-by: Chengji Yao <[email protected]>
…llm-project#14238) Signed-off-by: Akshat Tripathi <[email protected]> Signed-off-by: Chengji Yao <[email protected]> Co-authored-by: Chengji Yao <[email protected]> Signed-off-by: Yuqi Zhang <[email protected]>
This PR adds a Multi-LoRA implementation that works on the TPU backend, extending the work done in #11100, and supercedes #12623. It has a functional but unoptimised Pallas kernel implementation for the bgmv kernel.