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A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.C-enhancementCategory: An issue proposing an enhancement or a PR with one.Category: An issue proposing an enhancement or a PR with one.WG-llvmWorking group: LLVM backend code generationWorking group: LLVM backend code generation
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https://reviews.llvm.org/rL337221 introduced new intrinsics in LLVM IR that make it easier to guarantee that integer rotates will make it to the backend intact and can be lowered to a hardware rotate instruction (instead of possibly being split up into shifts and bitwise ors). Since we already expose rotates as methods on integer types, we could just change the implementation of those methods to lower to these IR intrinsics. As soon as we're on an LLVM version that supports these intrinsics, that is, but I wanted to file this issue before I forget about them.
leonardo-mlovesegfault and LifeIsStrange
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A-LLVMArea: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues.C-enhancementCategory: An issue proposing an enhancement or a PR with one.Category: An issue proposing an enhancement or a PR with one.WG-llvmWorking group: LLVM backend code generationWorking group: LLVM backend code generation