[DNM]Hamoa camss #325
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[DNM]Hamoa camss #325
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Add a base schema initially compatible with x1e80100 to describe MIPI CSI2 PHY devices. The hardware can support both C-PHY and D-PHY modes. The CSIPHY devices have their own pinouts on the SoC as well as their own individual voltage rails. The need to model voltage rails on a per-PHY basis leads us to define CSIPHY devices as individual nodes. Two nice outcomes in terms of schema and DT arise from this change. 1. The ability to define on a per-PHY basis voltage rails. 2. The ability to require those voltage. We have had a complete bodge upstream for this where a single set of voltage rail for all CSIPHYs has been buried inside of CAMSS. Much like the I2C bus which is dedicated to Camera sensors - the CCI bus in CAMSS parlance, the CSIPHY devices should be individually modelled. Signed-off-by: Bryan O'Donoghue <[email protected]>
Add a new MIPI CSI2 driver in D-PHY mode initially. The entire set of existing CAMSS CSI PHY init sequences are imported in order to save time and effort in later patches. In-line with other PHY drivers the process node name is omitted from the compat string while the soc name is included. At the moment we follow the assignment of lane positions - the bitmap of physical input lanes to logical lane numbers as a linear list per the existing DPHY @lanes data-member. This is fine for us in upstream since we also map the lanes contiguously but, our hardware can support different lane mappings so we should in the future extend out the DPHY structure to capture the mapping. The Qualcomm 3PH class of PHYs can do both D-PHY and C-PHY mode. For now only D-PHY is supported. In porting some of the logic over from camss-csiphy*.c to here its also possible to rationalise some of the code. In particular use of regulator_bulk and clk_bulk as well as dropping the seemingly useless and unused interrupt handler. The PHY sequences and a lot of the logic that goes with them are well proven in CAMSS and mature so the main thing to watch out for here is how to get the right sequencing of regulators, clocks and register-writes. Signed-off-by: Bryan O'Donoghue <[email protected]>
… bank to first address
The first register bank should be the 'main' register bank, in this case
the CSID wrapper register is responsible for muxing PHY/TPG inputs directly
to CSID or to other blocks such as the Sensor Front End.
commit f4792eeaa971 ("dt-bindings: media: qcom,x1e80100-camss: Fix isp unit address")
assigned the address to the first register bank "csid0" whereas what we
should have done is retained the unit address and moved csid_wrapper to be
the first listed bank.
Signed-off-by: Bryan O'Donoghue <[email protected]>
…nitions to PHY handles We currently do not have an upstream user of the x1e CAMSS schema which allows us to make this the first platform to treat the CSI PHYs as separate devices in much the same way as we treat the CCI block as separate devices. Convert the embedded CSIPHY node data to simple phys = <> removing all of the PHY specific stuff previously embedded. I gave some serious thought to making the Test Pattern Generators TPGs into PHY nodes also but, unlike the CSIPHYs the TPGs have no dedicated external pins nor regulators. The CSIPHYs OTOH have dedicated in-fact generally unmuxed pins on Qualcomm SoCs and each CSIPHY has its own set of input power rails usually 0p8 and 1p2. Instead of defining the CSIPHYs as children of the CAMSS block, we take the same approach as the CCI/I2C bus dedicated to CAMSS and define the CSIPHYs as their own nodes. Remove the embedded CSIPHY specific data and give CAMSS regular, bog-standard phys = <>; Signed-off-by: Bryan O'Donoghue <[email protected]>
Flag which SoCs have legacy - builtin PHY code. This will be useful in subsequent patches to inform PHY bringup logic if legacy bindings are available. Signed-off-by: Bryan O'Donoghue <[email protected]>
Add the ability to use a PHY pointer which interacts with the standard PHY API. In the first instance the code will try to use the new PHY interface. If no PHYs are present in the DT then the legacy method will be attempted. Signed-off-by: Bryan O'Donoghue <[email protected]>
x1e is the first CAMSS SoC to use the new PHY interface. Drop the redundant legacy CSIPHY descriptions. Signed-off-by: Bryan O'Donoghue <[email protected]>
The Arducam IMX577 module requires a longer reset time than the 1000µs configured in the current driver. Increase the wait time after power-on to ensure proper initialization. Signed-off-by: Wenmeng Liu <[email protected]>
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[DNM]Add change to support Hamoa EVK camera
Rebase changes form Bryan, add IMX577 support for Hamoa EVK.