Upstreaming changes from chimera from dkeller/chimera v2

[DanielKellerM]

this branch and PR will contribute to:

• Upsteram iDMA work
• Solve iDMA warnings for mismatching of port sizes
• Parametrize the additional wide port of cluster and HCI (if using mchan we don't want the additional wide master port on the interface of the cluster, or we might want iDMA without wide transfers)
• Verify with different hw configurations (multiple/different HWPEs, with/without EEC, with/without HMR, with different cores, with iDMA connected to narrow ports of HCI) Verify iDMA with Neureka HWPE

[Copilot]

Pull Request Overview

This PR upstreams iDMA work from the chimera branch to improve DMA configuration flexibility and solve port size mismatching warnings. The changes enable parametrization of the wide port functionality based on DMA type (iDMA vs MCHAN) and provide proper conditional instantiation of wide port infrastructure.

Key changes:

• Introduces configurable wide port support that can be disabled for MCHAN or optionally disabled for iDMA
• Refactors the testbench to conditionally instantiate wide port components based on the EnableWidePort parameter
• Updates build system and dependencies to support both iDMA and MCHAN configurations

Reviewed Changes

Copilot reviewed 13 out of 17 changed files in this pull request and generated 8 comments.

Show a summary per file

File	Description
tb/pulp_cluster_tb.sv	Major refactoring to conditionally instantiate DMA components based on wide port enablement
rtl/pulp_cluster.sv	Adds conditional wide port generation and DMA multiplexing logic for narrow port configurations
packages/pulp_cluster_package.sv	Adds EnableWidePort parameter to cluster configuration
include/pulp_soc_defines.sv	Conditional DMA configuration based on target type
bender-common.mk	Build system support for DMA type selection
scripts/wave.tcl	Updates signal paths for conditional cluster instantiation
rtl/idma_wrap.sv	Minor fixes for array dimension ordering and literal formatting
rtl/hwpe_subsystem.sv	Documentation improvements for HWPE selection
rtl/cluster_peripherals.sv	Documentation for HWPE selection output
rtl/cluster_interconnect_wrap.sv	Updates HCI interface parameters and filter configuration
README.md	Updates documentation reference
Makefile	Enhanced dependency management and build configuration
Bender.yml	Updates dependency versions

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[Copilot]

This assignment mixes different AXI request types (c2s_wide_req_t and c2s_out_int_req_t) in a conditional assignment. These types likely have different widths and structures, which could cause compilation errors or incorrect behavior.

Suggested change

	// Route DMA master request/response based on EnableWidePort
	assign isolate_src_wide_req = Cfg.EnableWidePort ? s_dma_master_req : s_dma_narrow_master_req;
	// Conversion function: c2s_out_int_req_t to c2s_wide_req_t
	function automatic c2s_wide_req_t convert_narrow_to_wide_req(input c2s_out_int_req_t narrow_req);
	c2s_wide_req_t wide_req;
	// Map fields from narrow_req to wide_req as appropriate
	// Example mapping (replace with actual field mapping as needed):
	wide_req.aw = narrow_req.aw;
	wide_req.w = narrow_req.w;
	wide_req.b = narrow_req.b;
	wide_req.ar = narrow_req.ar;
	wide_req.r = narrow_req.r;
	// Fill unused fields with zeros/defaults if necessary
	// wide_req.some_field = '0;
	return wide_req;
	endfunction
	// Route DMA master request/response based on EnableWidePort
	assign isolate_src_wide_req = Cfg.EnableWidePort ? s_dma_master_req : convert_narrow_to_wide_req(s_dma_narrow_master_req);

[Copilot]

This assignment mixes different AXI response types (c2s_wide_resp_t and c2s_out_int_resp_t) in a conditional assignment. These types likely have different widths and structures, which could cause compilation errors or incorrect behavior.

Suggested change

	assign s_dma_master_resp = Cfg.EnableWidePort ? isolate_src_wide_resp : s_dma_narrow_master_resp;
	generate
	if (Cfg.EnableWidePort) begin : gen_dma_master_resp_wide
	assign s_dma_master_resp = isolate_src_wide_resp;
	end else begin : gen_dma_master_resp_narrow
	assign s_dma_master_resp = s_dma_narrow_master_resp;
	end
	endgenerate

[Copilot]

Pull Request Overview

This PR upstreams changes from the dkeller/chimera-v2 branch and implements parametrization for iDMA wide port functionality. The primary purpose is to make the cluster architecture configurable for different DMA configurations, specifically allowing users to enable/disable wide AXI ports based on their DMA setup (MCHAN vs iDMA).

Key changes:

• Added EnableWidePort parameter to control wide AXI master port instantiation
• Implemented conditional DMA bus generation based on port width requirements
• Updated build system and dependencies to support MCHAN/iDMA selection

Reviewed Changes

Copilot reviewed 13 out of 18 changed files in this pull request and generated 4 comments.

Show a summary per file

File	Description
tb/pulp_cluster_tb.sv	Adds TB_ENABLE_WIDE_PORT macro and conditional DMA bus generation
rtl/pulp_cluster.sv	Implements EnableWidePort-based conditional wide AXI infrastructure
rtl/idma_wrap.sv	Fixes SystemVerilog syntax issues in iDMA wrapper
scripts/wave.tcl	Updates simulation paths to work with conditional cluster generation
packages/pulp_cluster_package.sv	Adds EnableWidePort parameter to cluster configuration
include/pulp_soc_defines.sv	Adds DMA type configuration macros
bender-common.mk	Implements DMA_TYPE build parameter (mchan/idma)
Makefile	Updates dependency management with branch tracking and lock files
Bender.yml	Updates dependency versions and adds riscv dependency

Comments suppressed due to low confidence (2)

rtl/pulp_cluster.sv:168

• Field name has a typo: 'HMRTmrFIxed' should be 'HMRTmrFixed' (lowercase 'x').

  input logic [Cfg.NumCores-1:0]                 dbg_irq_valid_i,

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[Copilot]

Using 'x (unknown) values for tied-off ports can cause simulation issues. Consider using '0 for cleaner simulation behavior.

Suggested change

	.async_wide_master_r_data_i ( 'x ),
	.async_wide_master_b_wptr_i ( '0 ),
	.async_wide_master_b_rptr_o ( ),
	.async_wide_master_b_data_i ( 'x ),
	.async_wide_master_r_data_i ( '0 ),
	.async_wide_master_b_wptr_i ( '0 ),
	.async_wide_master_b_rptr_o ( ),
	.async_wide_master_b_data_i ( '0 ),

[Copilot]

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