[SYCL] Rename ROCm plugin to HIP (intel#426)

Author: npmiller

SYCL/AtomicRef/atomic_memory_order.cpp

@@ -3,9 +3,9 @@
 // RUN: %CPU_RUN_PLACEHOLDER %t.out
 // RUN: %GPU_RUN_PLACEHOLDER %t.out
 // RUN: %ACC_RUN_PLACEHOLDER %t.out
-// L0, OpenCL, and ROCm backends don't currently support
+// L0, OpenCL, and HIP backends don't currently support
 // info::device::atomic_memory_order_capabilities
-// UNSUPPORTED: level_zero || opencl || rocm
+// UNSUPPORTED: level_zero || opencl || hip
 
 // NOTE: General tests for atomic memory order capabilities.
 

SYCL/AtomicRef/atomic_memory_order_acq_rel.cpp

@@ -3,9 +3,9 @@
 // RUN: %CPU_RUN_PLACEHOLDER %t.out
 // RUN: %GPU_RUN_PLACEHOLDER %t.out
 // RUN: %ACC_RUN_PLACEHOLDER %t.out
-// L0, OpenCL, and ROCm backends don't currently support
+// L0, OpenCL, and HIP backends don't currently support
 // info::device::atomic_memory_order_capabilities
-// UNSUPPORTED: level_zero || opencl || rocm
+// UNSUPPORTED: level_zero || opencl || hip
 
 // NOTE: Tests load and store for acquire-release memory ordering.
 

SYCL/AtomicRef/atomic_memory_order_acq_rel_atomic64.cpp

@@ -3,9 +3,9 @@
 // RUN: %CPU_RUN_PLACEHOLDER %t.out
 // RUN: %GPU_RUN_PLACEHOLDER %t.out
 // RUN: %ACC_RUN_PLACEHOLDER %t.out
-// L0, OpenCL, and ROCm backends don't currently support
+// L0, OpenCL, and HIP backends don't currently support
 // info::device::atomic_memory_order_capabilities
-// UNSUPPORTED: level_zero || opencl || rocm
+// UNSUPPORTED: level_zero || opencl || hip
 
 // NOTE: Tests load and store for acquire-release memory ordering with 64-bit
 //       values.

SYCL/AtomicRef/atomic_memory_order_seq_cst.cpp

@@ -3,9 +3,9 @@
 // RUN: %CPU_RUN_PLACEHOLDER %t.out
 // RUN: %GPU_RUN_PLACEHOLDER %t.out
 // RUN: %ACC_RUN_PLACEHOLDER %t.out
-// L0, OpenCL, and ROCm backends don't currently support
+// L0, OpenCL, and HIP backends don't currently support
 // info::device::atomic_memory_order_capabilities
-// UNSUPPORTED: level_zero || opencl || rocm
+// UNSUPPORTED: level_zero || opencl || hip
 
 // NOTE: Tests load and store for sequentially consistent memory ordering.
 

SYCL/AtomicRef/atomic_memory_order_seq_cst_atomic64.cpp

@@ -3,9 +3,9 @@
 // RUN: %CPU_RUN_PLACEHOLDER %t.out
 // RUN: %GPU_RUN_PLACEHOLDER %t.out
 // RUN: %ACC_RUN_PLACEHOLDER %t.out
-// L0, OpenCL, and ROCm backends don't currently support
+// L0, OpenCL, and HIP backends don't currently support
 // info::device::atomic_memory_order_capabilities
-// UNSUPPORTED: level_zero || opencl || rocm
+// UNSUPPORTED: level_zero || opencl || hip
 
 // NOTE: Tests load and store for sequentially consistent memory ordering with
 //       64-bit values.

SYCL/Basic/aspects.cpp

@@ -1,9 +1,8 @@
 // RUN: %clangxx -fsycl %s -o %t.out
 // RUN: env SYCL_DEVICE_FILTER=%sycl_be %t.out
 //
-// Hip is missing some of the parameters tested here so it fails with ROCm for
-// NVIDIA
-// XFAIL: rocm_nvidia
+// Hip is missing some of the parameters tested here so it fails with NVIDIA
+// XFAIL: hip_nvidia
 
 //==--------------- aspects.cpp - SYCL device test ------------------------==//
 //

SYCL/Basic/image/image.cpp

@@ -1,4 +1,4 @@
-// UNSUPPORTED: rocm
+// UNSUPPORTED: hip
 // RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
 // RUN: %HOST_RUN_PLACEHOLDER %t.out
 // RUN: %CPU_RUN_PLACEHOLDER %t.out

SYCL/Basic/image/image_accessor_readsampler.cpp

@@ -1,4 +1,4 @@
-// UNSUPPORTED: cuda || rocm
+// UNSUPPORTED: cuda || hip
 // CUDA cannot support SYCL 1.2.1 images.
 //
 // RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out

SYCL/Basic/image/image_accessor_readwrite.cpp

@@ -1,4 +1,4 @@
-// UNSUPPORTED: cuda || rocm
+// UNSUPPORTED: cuda || hip
 // CUDA cannot support SYCL 1.2.1 images.
 //
 // RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out

SYCL/Basic/image/image_accessor_readwrite_half.cpp

@@ -1,4 +1,4 @@
-// UNSUPPORTED: cuda || rocm
+// UNSUPPORTED: cuda || hip
 // CUDA cannot support SYCL 1.2.1 images.
 //
 // RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out