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[llvm][CodeGen] Fix failure in window scheduler caused by phi #95900

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Merged
merged 2 commits into from
Jun 19, 2024
Merged

[llvm][CodeGen] Fix failure in window scheduler caused by phi #95900

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295ff41
[llvm][CodeGen] Fix failure in window scheduler caused by phi
huaatian Jun 18, 2024
ea00efc
[llvm][CodeGen] Modifications made based on review comments 1
huaatian Jun 18, 2024
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11 changes: 7 additions & 4 deletions llvm/lib/CodeGen/WindowScheduler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -533,9 +533,12 @@ void WindowScheduler::schedulePhi(int Offset, unsigned &II) {
// The anti-dependency of phi need to be handled separately in the same way.
if (Register AntiReg = getAntiRegister(&Phi)) {
auto *AntiMI = MRI->getVRegDef(AntiReg);
auto AntiCycle = getOriCycle(AntiMI);
if (getOriStage(getOriMI(AntiMI), Offset) == 0)
LateCycle = std::min(LateCycle, AntiCycle);
// AntiReg may be defined outside the kernel MBB.
if (AntiMI->getParent() == MBB) {
auto AntiCycle = getOriCycle(AntiMI);
if (getOriStage(getOriMI(AntiMI), Offset) == 0)
LateCycle = std::min(LateCycle, AntiCycle);
}
}
// If there is no limit to the late cycle, a default value is given.
if (LateCycle == INT_MAX)
Expand Down Expand Up @@ -683,7 +686,7 @@ Register WindowScheduler::getAntiRegister(MachineInstr *Phi) {
for (auto MO : Phi->uses()) {
if (MO.isReg())
AntiReg = MO.getReg();
else if (MO.isMBB() && MO.getMBB()->getNumber() == MBB->getNumber())
else if (MO.isMBB() && MO.getMBB() == MBB)
return AntiReg;
}
return 0;
Expand Down
41 changes: 41 additions & 0 deletions llvm/test/CodeGen/Hexagon/swp-ws-phi.mir
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@@ -0,0 +1,41 @@
# REQUIRES: asserts
# RUN: llc --march=hexagon %s -run-pass=pipeliner -debug-only=pipeliner \
# RUN: -window-sched=force -filetype=null 2>&1 | FileCheck %s

# CHECK: Window scheduling is not needed!
# CHECK-LABEL: body: |
# CHECK: bb.0:
# CHECK: [[REG:%[0-9]+]]:intregs = A2_tfrsi 0
# CHECK: bb.2:
# CHECK: {{%[0-9]+}}:intregs = PHI {{%[0-9]+}}, %bb.0, [[REG]], %bb.2

---
name: poll_for_response
tracksRegLiveness: true
body: |
bb.0:
successors: %bb.2(0x80000000)
liveins: $r0, $r1

%0:intregs = COPY $r1
%1:intregs = COPY $r0
%2:intregs = A2_tfrsi 0
J2_loop0i %bb.2, 2, implicit-def $lc0, implicit-def $sa0, implicit-def $usr
J2_jump %bb.2, implicit-def dead $pc

bb.1:
PS_jmpret $r31, implicit-def dead $pc

bb.2:
successors: %bb.1(0x04000000), %bb.2(0x7c000000)

%3:intregs = PHI %1, %bb.0, %2, %bb.2
%4:intregs = PHI %2, %bb.0, %5, %bb.2
%6:intregs = S2_lsr_i_r %3, 1
S2_storerb_io %0, 0, killed %6
S4_storerb_rr %0, %4, 0, %2
%5:intregs = A2_tfrsi 1
ENDLOOP0 %bb.2, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0
J2_jump %bb.1, implicit-def $pc

...