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[TTI][AArch64] Add preferFixedIfEqualToScalable hook #95818

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[TTI][AArch64] Add preferFixedIfEqualToScalable hook #95818

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9 changes: 9 additions & 0 deletions llvm/include/llvm/Analysis/TargetTransformInfo.h
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Expand Up @@ -1674,6 +1674,11 @@ class TargetTransformInfo {
false; ///< If op is an fp min/max, whether NaNs may be present.
};

/// \returns True if the targets prefers fixed width vectorization if the
/// loop vectorizer's cost-model assigns an equal cost to the fixed and
/// scalable version of the vectorized loop.
bool preferFixedIfEqualToScalable() const;

/// \returns True if the target prefers reductions in loop.
bool preferInLoopReduction(unsigned Opcode, Type *Ty,
ReductionFlags Flags) const;
Expand Down Expand Up @@ -2143,6 +2148,7 @@ class TargetTransformInfo::Concept {
virtual unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const = 0;
virtual bool preferFixedIfEqualToScalable() const = 0;
virtual bool preferInLoopReduction(unsigned Opcode, Type *Ty,
ReductionFlags) const = 0;
virtual bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
Expand Down Expand Up @@ -2873,6 +2879,9 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
VectorType *VecTy) const override {
return Impl.getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
}
bool preferFixedIfEqualToScalable() const override {
return Impl.preferFixedIfEqualToScalable();
}
bool preferInLoopReduction(unsigned Opcode, Type *Ty,
ReductionFlags Flags) const override {
return Impl.preferInLoopReduction(Opcode, Ty, Flags);
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2 changes: 2 additions & 0 deletions llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
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Expand Up @@ -913,6 +913,8 @@ class TargetTransformInfoImplBase {
return VF;
}

bool preferFixedIfEqualToScalable() const { return false; }

bool preferInLoopReduction(unsigned Opcode, Type *Ty,
TTI::ReductionFlags Flags) const {
return false;
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4 changes: 4 additions & 0 deletions llvm/lib/Analysis/TargetTransformInfo.cpp
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Expand Up @@ -1282,6 +1282,10 @@ unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
}

bool TargetTransformInfo::preferFixedIfEqualToScalable() const {
return TTIImpl->preferFixedIfEqualToScalable();
}

bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty,
ReductionFlags Flags) const {
return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
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3 changes: 3 additions & 0 deletions llvm/lib/Target/AArch64/AArch64Features.td
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Expand Up @@ -244,6 +244,9 @@ def FeatureExperimentalZeroingPseudos
def FeatureUseScalarIncVL : SubtargetFeature<"use-scalar-inc-vl",
"UseScalarIncVL", "true", "Prefer inc/dec over add+cnt">;

def FeatureUseFixedIfEqualToScalable : SubtargetFeature<"use-fixed-if-equal-to-scalable",
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This could probably do with the word "Cost" in their somewhere. Maybe FeatureUseFixedOverScalableIfEqualCost

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Does this need to be a full-blown feature if you intend to just enable it by default for V2 anyway? When we added VScaleForTuning, we just used a boolean in AArch64Subtarget that gets set during initialisation for the particular CPU. See AArch64Subtarget::initializeProperties.

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Subtarget features are considered the best way to add tuning features like this. There is even a comment about it

void AArch64Subtarget::initializeProperties(bool HasMinSize) {
  // Initialize CPU specific properties. We should add a tablegen feature for
  // this in the future so we can specify it together with the subtarget
  // features.

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Ah ok. Fair enough!

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In that case maybe it's worth us revisiting VScaleForTuning as well and making that a feature for consistency.

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Thanks for the naming suggesting, I was struggling with the name, will change it to FeatureUseFixedOverScalableIfEqualCost.

"UseFixedIfEqualToScalable", "true", "Prefer fixed width loop vectorization over scalable if cost-model assigns equal costs">;

def FeatureBF16 : Extension<"bf16", "BF16",
"Enable BFloat16 Extension (FEAT_BF16)", [],
"FEAT_BF16", "+bf16", 280>;
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1 change: 1 addition & 0 deletions llvm/lib/Target/AArch64/AArch64Processors.td
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Expand Up @@ -489,6 +489,7 @@ def TuneNeoverseV2 : SubtargetFeature<"neoversev2", "ARMProcFamily", "NeoverseV2
FeatureALULSLFast,
FeaturePostRAScheduler,
FeatureEnableSelectOptimize,
FeatureUseFixedIfEqualToScalable,
FeaturePredictableSelectIsExpensive]>;

def TuneNeoverseV3 : SubtargetFeature<"neoversev3", "ARMProcFamily", "NeoverseV3",
Expand Down
4 changes: 4 additions & 0 deletions llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
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Expand Up @@ -371,6 +371,10 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
return TailFoldingStyle::DataWithoutLaneMask;
}

bool preferFixedIfEqualToScalable() const {
return ST->useFixedIfEqualToScalable();
}

bool preferPredicateOverEpilogue(TailFoldingInfo *TFI);

bool supportsScalableVectors() const { return ST->hasSVE(); }
Expand Down
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