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Reland "[NFC][AMDGPU] Do not flush after printing every instruction" #95248

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Pierre-vh
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Reland of #95237 with fix to failing test. The test relied on stderr/stdout output being interleaved in a specific order.

It's very expensive and doesn't achieve anything.

I one test I did, it saves almost 10s on a 2m23s build, bringing it down to 2m15s using a downstream branch.

@Pierre-vh
Reland "[NFC][AMDGPU] Do not flush after printing every instruction"
3a8cedf 
Reland of llvm#95237
With fix to failing test.

It's very expensive and doesn't achieve anything.

I one test I did, it saves almost 10s on a 2m23s build, bringing it down
to 2m15s using a downstream branch.
@Pierre-vh Pierre-vh requested review from jayfoad, arsenm and JanekvO June 12, 2024 13:34
@llvmbot llvmbot added backend:AMDGPU mc Machine (object) code labels Jun 12, 2024
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llvmbot commented Jun 12, 2024

@llvm/pr-subscribers-backend-amdgpu

Author: Pierre van Houtryve (Pierre-vh)

Changes

Reland of #95237 with fix to failing test. The test relied on stderr/stdout output being interleaved in a specific order.

It's very expensive and doesn't achieve anything.

I one test I did, it saves almost 10s on a 2m23s build, bringing it down to 2m15s using a downstream branch.

Full diff: https://github.com/llvm/llvm-project/pull/95248.diff

3 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp (-1)
  • (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp (-1)
  • (modified) llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s (+17-55)
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 883b6c4407fe5..227b7383e16d5 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -43,7 +43,6 @@ void AMDGPUInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
 void AMDGPUInstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                   StringRef Annot, const MCSubtargetInfo &STI,
                                   raw_ostream &OS) {
-  OS.flush();
   printInstruction(MI, Address, STI, OS);
   printAnnotation(OS, Annot);
 }
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
index 22d0594e2b86a..56a23e26b8d9f 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
@@ -21,7 +21,6 @@ using namespace llvm;
 void R600InstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                 StringRef Annot, const MCSubtargetInfo &STI,
                                 raw_ostream &O) {
-  O.flush();
   printInstruction(MI, Address, O);
   printAnnotation(O, Annot);
 }
diff --git a/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s b/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
index fab3e893352b2..fe6d3c21b9a37 100644
--- a/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
+++ b/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
@@ -4,10 +4,8 @@
 // they don't depend on yet-unknown symbolic values.
 
 .text
-// ASM: .text
 
 .amdhsa_code_object_version 4
-// ASM: .amdhsa_code_object_version 4
 
 .p2align 8
 .type user_sgpr_count,@function
@@ -19,11 +17,10 @@ user_sgpr_count:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_count defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_count
 
 .p2align 8
 .type user_sgpr_private_segment_buffer,@function
@@ -34,12 +31,10 @@ user_sgpr_private_segment_buffer:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_private_segment_buffer defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_private_segment_buffer
-
 .p2align 8
 .type user_sgpr_kernarg_preload_length,@function
 user_sgpr_kernarg_preload_length:
@@ -49,12 +44,10 @@ user_sgpr_kernarg_preload_length:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_kernarg_preload_length defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_kernarg_preload_length defined_boolean
-
 .p2align 8
 .type user_sgpr_kernarg_preload_offset,@function
 user_sgpr_kernarg_preload_offset:
@@ -64,12 +57,10 @@ user_sgpr_kernarg_preload_offset:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_kernarg_preload_offset defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_kernarg_preload_offset defined_boolean
-
 .p2align 8
 .type user_sgpr_dispatch_ptr,@function
 user_sgpr_dispatch_ptr:
@@ -80,12 +71,10 @@ user_sgpr_dispatch_ptr:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_dispatch_ptr defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_dispatch_ptr
-
 .p2align 8
 .type user_sgpr_queue_ptr,@function
 user_sgpr_queue_ptr:
@@ -96,12 +85,10 @@ user_sgpr_queue_ptr:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_queue_ptr defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_queue_ptr
-
 .p2align 8
 .type user_sgpr_kernarg_segment_ptr,@function
 user_sgpr_kernarg_segment_ptr:
@@ -112,12 +99,10 @@ user_sgpr_kernarg_segment_ptr:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_kernarg_segment_ptr defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_kernarg_segment_ptr
-
 .p2align 8
 .type user_sgpr_dispatch_id,@function
 user_sgpr_dispatch_id:
@@ -128,12 +113,10 @@ user_sgpr_dispatch_id:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_dispatch_id defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_dispatch_id
-
 .p2align 8
 .type user_sgpr_flat_scratch_init,@function
 user_sgpr_flat_scratch_init:
@@ -144,12 +127,10 @@ user_sgpr_flat_scratch_init:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_flat_scratch_init defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_flat_scratch_init
-
 .p2align 8
 .type user_sgpr_private_segment_size,@function
 user_sgpr_private_segment_size:
@@ -160,12 +141,10 @@ user_sgpr_private_segment_size:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_private_segment_size defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_private_segment_size
-
 .p2align 8
 .type wavefront_size32,@function
 wavefront_size32:
@@ -176,12 +155,10 @@ wavefront_size32:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_wavefront_size32 defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_wavefront_size32
-
 .p2align 8
 .type next_free_vgpr,@function
 next_free_vgpr:
@@ -189,14 +166,12 @@ next_free_vgpr:
 
 .p2align 6
 .amdhsa_kernel next_free_vgpr
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_next_free_vgpr defined_boolean
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_next_free_vgpr
-
 .p2align 8
 .type next_free_sgpr,@function
 next_free_sgpr:
@@ -205,13 +180,11 @@ next_free_sgpr:
 .p2align 6
 .amdhsa_kernel next_free_sgpr
   .amdhsa_next_free_vgpr 0
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_next_free_sgpr defined_boolean
   .amdhsa_accum_offset 4
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_next_free_sgpr
-
 .p2align 8
 .type accum_offset,@function
 accum_offset:
@@ -221,12 +194,10 @@ accum_offset:
 .amdhsa_kernel accum_offset
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_accum_offset defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_accum_offset
-
 .p2align 8
 .type reserve_vcc,@function
 reserve_vcc:
@@ -237,12 +208,10 @@ reserve_vcc:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_reserve_vcc defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_reserve_vcc
-
 .p2align 8
 .type reserve_flat_scratch,@function
 reserve_flat_scratch:
@@ -253,12 +222,10 @@ reserve_flat_scratch:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_reserve_flat_scratch defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_reserve_flat_scratch
-
 .p2align 8
 .type shared_vgpr_count,@function
 shared_vgpr_count:
@@ -269,13 +236,8 @@ shared_vgpr_count:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_shared_vgpr_count defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_shared_vgpr_count
-
 .set defined_boolean, 1
-
-// ASM:       .set defined_boolean, 1
-// ASM-NEXT:  .no_dead_strip defined_boolean

@llvmbot
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llvmbot commented Jun 12, 2024

@llvm/pr-subscribers-mc

Author: Pierre van Houtryve (Pierre-vh)

Changes

Reland of #95237 with fix to failing test. The test relied on stderr/stdout output being interleaved in a specific order.

It's very expensive and doesn't achieve anything.

I one test I did, it saves almost 10s on a 2m23s build, bringing it down to 2m15s using a downstream branch.

Full diff: https://github.com/llvm/llvm-project/pull/95248.diff

3 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp (-1)
  • (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp (-1)
  • (modified) llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s (+17-55)
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
index 883b6c4407fe5..227b7383e16d5 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -43,7 +43,6 @@ void AMDGPUInstPrinter::printRegName(raw_ostream &OS, MCRegister Reg) const {
 void AMDGPUInstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                   StringRef Annot, const MCSubtargetInfo &STI,
                                   raw_ostream &OS) {
-  OS.flush();
   printInstruction(MI, Address, STI, OS);
   printAnnotation(OS, Annot);
 }
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
index 22d0594e2b86a..56a23e26b8d9f 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/R600InstPrinter.cpp
@@ -21,7 +21,6 @@ using namespace llvm;
 void R600InstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                 StringRef Annot, const MCSubtargetInfo &STI,
                                 raw_ostream &O) {
-  O.flush();
   printInstruction(MI, Address, O);
   printAnnotation(O, Annot);
 }
diff --git a/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s b/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
index fab3e893352b2..fe6d3c21b9a37 100644
--- a/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
+++ b/llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
@@ -4,10 +4,8 @@
 // they don't depend on yet-unknown symbolic values.
 
 .text
-// ASM: .text
 
 .amdhsa_code_object_version 4
-// ASM: .amdhsa_code_object_version 4
 
 .p2align 8
 .type user_sgpr_count,@function
@@ -19,11 +17,10 @@ user_sgpr_count:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_count defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_count
 
 .p2align 8
 .type user_sgpr_private_segment_buffer,@function
@@ -34,12 +31,10 @@ user_sgpr_private_segment_buffer:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_private_segment_buffer defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_private_segment_buffer
-
 .p2align 8
 .type user_sgpr_kernarg_preload_length,@function
 user_sgpr_kernarg_preload_length:
@@ -49,12 +44,10 @@ user_sgpr_kernarg_preload_length:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_kernarg_preload_length defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_kernarg_preload_length defined_boolean
-
 .p2align 8
 .type user_sgpr_kernarg_preload_offset,@function
 user_sgpr_kernarg_preload_offset:
@@ -64,12 +57,10 @@ user_sgpr_kernarg_preload_offset:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_kernarg_preload_offset defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_kernarg_preload_offset defined_boolean
-
 .p2align 8
 .type user_sgpr_dispatch_ptr,@function
 user_sgpr_dispatch_ptr:
@@ -80,12 +71,10 @@ user_sgpr_dispatch_ptr:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_dispatch_ptr defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_dispatch_ptr
-
 .p2align 8
 .type user_sgpr_queue_ptr,@function
 user_sgpr_queue_ptr:
@@ -96,12 +85,10 @@ user_sgpr_queue_ptr:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_queue_ptr defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_queue_ptr
-
 .p2align 8
 .type user_sgpr_kernarg_segment_ptr,@function
 user_sgpr_kernarg_segment_ptr:
@@ -112,12 +99,10 @@ user_sgpr_kernarg_segment_ptr:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_kernarg_segment_ptr defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_kernarg_segment_ptr
-
 .p2align 8
 .type user_sgpr_dispatch_id,@function
 user_sgpr_dispatch_id:
@@ -128,12 +113,10 @@ user_sgpr_dispatch_id:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_dispatch_id defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_dispatch_id
-
 .p2align 8
 .type user_sgpr_flat_scratch_init,@function
 user_sgpr_flat_scratch_init:
@@ -144,12 +127,10 @@ user_sgpr_flat_scratch_init:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_flat_scratch_init defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_flat_scratch_init
-
 .p2align 8
 .type user_sgpr_private_segment_size,@function
 user_sgpr_private_segment_size:
@@ -160,12 +141,10 @@ user_sgpr_private_segment_size:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_user_sgpr_private_segment_size defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_user_sgpr_private_segment_size
-
 .p2align 8
 .type wavefront_size32,@function
 wavefront_size32:
@@ -176,12 +155,10 @@ wavefront_size32:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_wavefront_size32 defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_wavefront_size32
-
 .p2align 8
 .type next_free_vgpr,@function
 next_free_vgpr:
@@ -189,14 +166,12 @@ next_free_vgpr:
 
 .p2align 6
 .amdhsa_kernel next_free_vgpr
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_next_free_vgpr defined_boolean
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_next_free_vgpr
-
 .p2align 8
 .type next_free_sgpr,@function
 next_free_sgpr:
@@ -205,13 +180,11 @@ next_free_sgpr:
 .p2align 6
 .amdhsa_kernel next_free_sgpr
   .amdhsa_next_free_vgpr 0
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_next_free_sgpr defined_boolean
   .amdhsa_accum_offset 4
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_next_free_sgpr
-
 .p2align 8
 .type accum_offset,@function
 accum_offset:
@@ -221,12 +194,10 @@ accum_offset:
 .amdhsa_kernel accum_offset
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_accum_offset defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_accum_offset
-
 .p2align 8
 .type reserve_vcc,@function
 reserve_vcc:
@@ -237,12 +208,10 @@ reserve_vcc:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_reserve_vcc defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_reserve_vcc
-
 .p2align 8
 .type reserve_flat_scratch,@function
 reserve_flat_scratch:
@@ -253,12 +222,10 @@ reserve_flat_scratch:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_reserve_flat_scratch defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_reserve_flat_scratch
-
 .p2align 8
 .type shared_vgpr_count,@function
 shared_vgpr_count:
@@ -269,13 +236,8 @@ shared_vgpr_count:
   .amdhsa_next_free_vgpr 0
   .amdhsa_next_free_sgpr 0
   .amdhsa_accum_offset 4
+// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
   .amdhsa_shared_vgpr_count defined_boolean
 .end_amdhsa_kernel
 
-// ASM: error: directive should have resolvable expression
-// ASM-NEXT:   .amdhsa_shared_vgpr_count
-
 .set defined_boolean, 1
-
-// ASM:       .set defined_boolean, 1
-// ASM-NEXT:  .no_dead_strip defined_boolean

arsenm
arsenm reviewed Jun 12, 2024
View reviewed changes
llvm/test/MC/AMDGPU/hsa-sym-expr-failure.s
@@ -49,12 +44,10 @@ user_sgpr_kernarg_preload_length:
.amdhsa_next_free_vgpr 0
.amdhsa_next_free_sgpr 0
.amdhsa_accum_offset 4
// ASM: :[[@LINE+1]]:{{[0-9]+}}: error: directive should have resolvable expression
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Just precommit the unrelated test changes

@Pierre-vh
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fc19d62 and fc19d62

@Pierre-vh Pierre-vh closed this Jun 13, 2024
@Pierre-vh Pierre-vh deleted the reland-no-flush-each branch June 13, 2024 06:30
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@arsenm arsenm arsenm left review comments

@jayfoad jayfoad Awaiting requested review from jayfoad

@JanekvO JanekvO Awaiting requested review from JanekvO

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@Pierre-vh @llvmbot @arsenm