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[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions #77438

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Merged
merged 3 commits into from
Jan 18, 2024
Merged

[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions #77438

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2cd8fc6
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions
jayfoad Jan 9, 2024
5093529
Merge remote-tracking branch 'origin/main' into gfx12-waitcnts
jayfoad Jan 12, 2024
b1a3022
Merge remote-tracking branch 'origin/main' into gfx12-waitcnts
jayfoad Jan 18, 2024
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3 changes: 2 additions & 1 deletion llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
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Expand Up @@ -1242,7 +1242,8 @@ bool GCNHazardRecognizer::fixSMEMtoVectorWriteHazards(MachineInstr *MI) {
case AMDGPU::S_WAITCNT: {
const int64_t Imm = MI.getOperand(0).getImm();
AMDGPU::Waitcnt Decoded = AMDGPU::decodeWaitcnt(IV, Imm);
return (Decoded.LgkmCnt == 0);
// DsCnt corresponds to LGKMCnt here.
return (Decoded.DsCnt == 0);
}
default:
// SOPP instructions cannot mitigate the hazard.
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4 changes: 4 additions & 0 deletions llvm/lib/Target/AMDGPU/GCNSubtarget.h
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Expand Up @@ -1200,6 +1200,10 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,

bool hasRestrictedSOffset() const { return HasRestrictedSOffset; }

/// \returns true if the target uses LOADcnt/SAMPLEcnt/BVHcnt, DScnt/KMcnt
/// and STOREcnt rather than VMcnt, LGKMcnt and VScnt respectively.
bool hasExtendedWaitCounts() const { return getGeneration() >= GFX12; }

/// Return the maximum number of waves per SIMD for kernels using \p SGPRs
/// SGPRs
unsigned getOccupancyWithNumSGPRs(unsigned SGPRs) const;
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