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[AMDGPU] Allow folding to FMAMK with SGPR and immediate operand on GFX10+ #72258

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Merged
merged 1 commit into from
Nov 15, 2023
Merged

[AMDGPU] Allow folding to FMAMK with SGPR and immediate operand on GFX10+ #72258

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6 changes: 4 additions & 2 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3445,8 +3445,10 @@ bool SIInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
(Src1->isReg() && Src1->getReg() == Reg)) {
MachineOperand *RegSrc =
Src1->isReg() && Src1->getReg() == Reg ? Src0 : Src1;
if (!RegSrc->isReg() ||
RI.isSGPRClass(MRI->getRegClass(RegSrc->getReg())))
if (!RegSrc->isReg())
return false;
if (RI.isSGPRClass(MRI->getRegClass(RegSrc->getReg())) &&
ST.getConstantBusLimit(Opc) < 2)
return false;

if (!Src2->isReg() || RI.isSGPRClass(MRI->getRegClass(Src2->getReg())))
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33 changes: 27 additions & 6 deletions llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
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Expand Up @@ -715,12 +715,33 @@ define amdgpu_ps i32 @s_mul_fma_32_f32(float inreg %x, float inreg %y) {
; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX1011-LABEL: s_mul_fma_32_f32:
; GFX1011: ; %bb.0:
; GFX1011-NEXT: v_mov_b32_e32 v0, s1
; GFX1011-NEXT: v_fmac_f32_e64 v0, 0x42000000, s0
; GFX1011-NEXT: v_readfirstlane_b32 s0, v0
; GFX1011-NEXT: ; return to shader part epilog
; GFX10-SDAG-LABEL: s_mul_fma_32_f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s1
; GFX10-SDAG-NEXT: v_fmamk_f32 v0, s0, 0x42000000, v0
; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-SDAG-NEXT: ; return to shader part epilog
;
; GFX10-GISEL-LABEL: s_mul_fma_32_f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s1
; GFX10-GISEL-NEXT: v_fmac_f32_e64 v0, 0x42000000, s0
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We are only successfully folding to fmamk for sdag. To make it work for gisel we need something like #72128.

; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-GISEL-NEXT: ; return to shader part epilog
;
; GFX11-SDAG-LABEL: s_mul_fma_32_f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s1
; GFX11-SDAG-NEXT: v_fmamk_f32 v0, s0, 0x42000000, v0
; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-SDAG-NEXT: ; return to shader part epilog
;
; GFX11-GISEL-LABEL: s_mul_fma_32_f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s1
; GFX11-GISEL-NEXT: v_fmac_f32_e64 v0, 0x42000000, s0
; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v0
; GFX11-GISEL-NEXT: ; return to shader part epilog
%mul = fmul contract float %x, 32.0
%fma = fadd contract float %mul, %y
%cast = bitcast float %fma to i32
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