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[llvm][RISCV] Add frm range check for xsfvfnrclipxfqf #172135

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[llvm][RISCV] Add frm range check for xsfvfnrclipxfqf #172135

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10 changes: 10 additions & 0 deletions clang/lib/Sema/SemaRISCV.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1128,6 +1128,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI,
case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm_m:
case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm_m:
case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm_m:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm:
return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 4);
case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tu:
case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tu:
Expand Down Expand Up @@ -1271,6 +1273,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI,
case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm_mu:
case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm_mu:
case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm_mu:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_tu:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_tu:
return SemaRef.BuiltinConstantArgRange(TheCall, 3, 0, 4);
case RISCVVector::BI__builtin_rvv_vfmacc_vv_rm_m:
case RISCVVector::BI__builtin_rvv_vfmacc_vf_rm_m:
Expand Down Expand Up @@ -1440,6 +1444,12 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI,
case RISCVVector::BI__builtin_rvv_vfwnmsac_vf_rm_mu:
case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vv_rm_mu:
case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vf_rm_mu:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_tum:
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@topperc topperc Dec 13, 2025

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Can we put the tum intrinsics at the end of the other tum intrinsics in the switch. Same with tumu.

case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_tumu:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_mu:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_tum:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_tumu:
case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_mu:
return SemaRef.BuiltinConstantArgRange(TheCall, 4, 0, 4);
case RISCV::BI__builtin_riscv_ntl_load:
case RISCV::BI__builtin_riscv_ntl_store:
Expand Down