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[DAG] getCarry - always succeed if we encounter a i1 type during trunc/ext peeling #169777

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Merged
RKSimon merged 3 commits into from
Nov 30, 2025
Merged

[DAG] getCarry - always succeed if we encounter a i1 type during trunc/ext peeling #169777

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100c16b
[DAG] getCarry - always succeed if we encounter a i1 type during trun…
RKSimon Nov 27, 2025
c5a160e
Merge branch 'main' into dag-getcarry-i1
RKSimon Nov 27, 2025
dfe5d39
Merge branch 'main' into dag-getcarry-i1
RKSimon Nov 30, 2025
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6 changes: 3 additions & 3 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3288,6 +3288,9 @@ static SDValue getAsCarry(const TargetLowering &TLI, SDValue V,

// First, peel away TRUNCATE/ZERO_EXTEND/AND nodes due to legalization.
while (true) {
if (ForceCarryReconstruction && V.getValueType() == MVT::i1)
return V;

if (V.getOpcode() == ISD::TRUNCATE || V.getOpcode() == ISD::ZERO_EXTEND) {
V = V.getOperand(0);
continue;
Expand All @@ -3302,9 +3305,6 @@ static SDValue getAsCarry(const TargetLowering &TLI, SDValue V,
continue;
}

if (ForceCarryReconstruction && V.getValueType() == MVT::i1)
return V;

break;
}

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15 changes: 3 additions & 12 deletions llvm/test/CodeGen/X86/addcarry.ll
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Expand Up @@ -1517,18 +1517,9 @@ define i1 @pr84831(i64 %arg) {
define void @pr169691(ptr %p0, i64 %implicit, i1 zeroext %carry) {
; CHECK-LABEL: pr169691:
; CHECK: # %bb.0:
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: addq %rsi, %rax
; CHECK-NEXT: setb %cl
; CHECK-NEXT: movl %edx, %edx
; CHECK-NEXT: addq %rax, %rdx
; CHECK-NEXT: setb %al
; CHECK-NEXT: orb %cl, %al
; CHECK-NEXT: movq %rdx, (%rdi)
; CHECK-NEXT: addq 8(%rdi), %rsi
; CHECK-NEXT: movzbl %al, %eax
; CHECK-NEXT: addq %rsi, %rax
; CHECK-NEXT: movq %rax, 8(%rdi)
; CHECK-NEXT: addb $-1, %dl
; CHECK-NEXT: adcq %rsi, (%rdi)
; CHECK-NEXT: adcq %rsi, 8(%rdi)
; CHECK-NEXT: retq
%a0 = load i64, ptr %p0, align 8
%uaddo0 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %a0, i64 %implicit)
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