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[M68k] Fix incorrect boolean content type #152572

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Merged
merged 3 commits into from
Aug 12, 2025
Merged

[M68k] Fix incorrect boolean content type #152572

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65ecc9d
[M68k] Fix incorrect boolean content type
dansalvato Jul 3, 2025
6453449
fixup! [M68k] Fix incorrect boolean content type
dansalvato Aug 12, 2025
2a99471
Merge branch 'main' into m68k-boolean-contents
dansalvato Aug 12, 2025
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2 changes: 1 addition & 1 deletion llvm/lib/Target/M68k/M68kISelLowering.cpp
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Expand Up @@ -51,7 +51,7 @@ M68kTargetLowering::M68kTargetLowering(const M68kTargetMachine &TM,

MVT PtrVT = MVT::i32;

setBooleanContents(ZeroOrOneBooleanContent);
setBooleanContents(ZeroOrNegativeOneBooleanContent);

auto *RegInfo = Subtarget.getRegisterInfo();
setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister());
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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/M68k/Arith/add.ll
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Expand Up @@ -85,9 +85,9 @@ define fastcc i32 @test9(i32 %x, i32 %y) nounwind readnone {
; CHECK: ; %bb.0:
; CHECK-NEXT: sub.l #10, %d0
; CHECK-NEXT: seq %d0
; CHECK-NEXT: and.l #255, %d0
; CHECK-NEXT: sub.l %d0, %d1
; CHECK-NEXT: move.l %d1, %d0
; CHECK-NEXT: ext.w %d0
; CHECK-NEXT: ext.l %d0
; CHECK-NEXT: add.l %d1, %d0
; CHECK-NEXT: rts
%cmp = icmp eq i32 %x, 10
%sub = sext i1 %cmp to i32
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5 changes: 3 additions & 2 deletions llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
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Expand Up @@ -102,8 +102,9 @@ define fastcc i1 @test2(i32 %v1, i32 %v2) nounwind {
; CHECK-NEXT: suba.l #12, %sp
; CHECK-NEXT: muls.l %d1, %d0
; CHECK-NEXT: svs %d1
; CHECK-NEXT: sub.b #1, %d1
; CHECK-NEXT: bne .LBB4_2
; CHECK-NEXT: and.b #1, %d1
; CHECK-NEXT: cmpi.b #0, %d1
; CHECK-NEXT: beq .LBB4_2
; CHECK-NEXT: ; %bb.1: ; %overflow
; CHECK-NEXT: lea (no,%pc), %a0
; CHECK-NEXT: move.l %a0, (%sp)
Expand Down
65 changes: 39 additions & 26 deletions llvm/test/CodeGen/M68k/Atomics/rmw.ll
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Expand Up @@ -37,9 +37,10 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
; ATOMIC-NEXT: move.b %d0, %d3
; ATOMIC-NEXT: sub.b %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.b %d0, %d2
; ATOMIC-NEXT: bne .LBB0_1
; ATOMIC-NEXT: beq .LBB0_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
; ATOMIC-NEXT: adda.l #8, %sp
Expand Down Expand Up @@ -80,9 +81,10 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
; ATOMIC-NEXT: move.w %d0, %d3
; ATOMIC-NEXT: sub.w %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.w %d0, %d2
; ATOMIC-NEXT: bne .LBB1_1
; ATOMIC-NEXT: beq .LBB1_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
; ATOMIC-NEXT: adda.l #8, %sp
Expand Down Expand Up @@ -121,9 +123,10 @@ define i32 @atomicrmw_and_i32(i32 %val, ptr %ptr) {
; ATOMIC-NEXT: move.l %d0, %d3
; ATOMIC-NEXT: sub.l %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.l %d0, %d2
; ATOMIC-NEXT: bne .LBB2_1
; ATOMIC-NEXT: beq .LBB2_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
; ATOMIC-NEXT: adda.l #8, %sp
Expand Down Expand Up @@ -194,9 +197,10 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
; ATOMIC-NEXT: move.b %d0, %d3
; ATOMIC-NEXT: sub.b %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.b %d0, %d2
; ATOMIC-NEXT: bne .LBB4_1
; ATOMIC-NEXT: beq .LBB4_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
; ATOMIC-NEXT: adda.l #8, %sp
Expand Down Expand Up @@ -242,9 +246,10 @@ define i16 @atmoicrmw_nand_i16(i16 %val, ptr %ptr) {
; ATOMIC-NEXT: move.w %d1, %d3
; ATOMIC-NEXT: sub.w %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.w %d1, %d2
; ATOMIC-NEXT: bne .LBB5_1
; ATOMIC-NEXT: beq .LBB5_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
; ATOMIC-NEXT: adda.l #8, %sp
Expand Down Expand Up @@ -282,9 +287,10 @@ define i32 @atomicrmw_min_i32(i32 %val, ptr %ptr) {
; ATOMIC-NEXT: move.l %d0, %d3
; ATOMIC-NEXT: sub.l %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.l %d0, %d2
; ATOMIC-NEXT: beq .LBB6_4
; ATOMIC-NEXT: bne .LBB6_4
; ATOMIC-NEXT: .LBB6_1: ; %atomicrmw.start
; ATOMIC-NEXT: ; =>This Inner Loop Header: Depth=1
; ATOMIC-NEXT: move.l %d2, %d0
Expand Down Expand Up @@ -434,9 +440,10 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
; ATOMIC-NEXT: move.b %d0, %d3
; ATOMIC-NEXT: sub.b %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.b %d0, %d2
; ATOMIC-NEXT: beq .LBB8_4
; ATOMIC-NEXT: bne .LBB8_4
; ATOMIC-NEXT: .LBB8_1: ; %atomicrmw.start
; ATOMIC-NEXT: ; =>This Inner Loop Header: Depth=1
; ATOMIC-NEXT: move.b %d2, %d0
Expand Down Expand Up @@ -486,9 +493,10 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
; ATOMIC-NEXT: move.w %d0, %d3
; ATOMIC-NEXT: sub.w %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.w %d0, %d2
; ATOMIC-NEXT: beq .LBB9_4
; ATOMIC-NEXT: bne .LBB9_4
; ATOMIC-NEXT: .LBB9_1: ; %atomicrmw.start
; ATOMIC-NEXT: ; =>This Inner Loop Header: Depth=1
; ATOMIC-NEXT: move.w %d2, %d0
Expand Down Expand Up @@ -537,9 +545,10 @@ define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
; ATOMIC-NEXT: move.w %d0, %d3
; ATOMIC-NEXT: sub.w %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.w %d0, %d2
; ATOMIC-NEXT: bne .LBB10_1
; ATOMIC-NEXT: beq .LBB10_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
; ATOMIC-NEXT: adda.l #8, %sp
Expand Down Expand Up @@ -577,9 +586,10 @@ define i32 @atomicrmw_xchg_i32(i32 %val, ptr %ptr) {
; ATOMIC-NEXT: move.l %d0, %d3
; ATOMIC-NEXT: sub.l %d2, %d3
; ATOMIC-NEXT: seq %d2
; ATOMIC-NEXT: sub.b #1, %d2
; ATOMIC-NEXT: and.b #1, %d2
; ATOMIC-NEXT: cmpi.b #0, %d2
; ATOMIC-NEXT: move.l %d0, %d2
; ATOMIC-NEXT: bne .LBB11_1
; ATOMIC-NEXT: beq .LBB11_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2-%d3 ; 12-byte Folded Reload
; ATOMIC-NEXT: adda.l #8, %sp
Expand Down Expand Up @@ -622,9 +632,10 @@ define i8 @atomicrmw_sub_i8_arid(ptr align 2 %self) {
; ATOMIC-NEXT: move.b %d0, %d2
; ATOMIC-NEXT: sub.b %d1, %d2
; ATOMIC-NEXT: seq %d1
; ATOMIC-NEXT: sub.b #1, %d1
; ATOMIC-NEXT: and.b #1, %d1
; ATOMIC-NEXT: cmpi.b #0, %d1
; ATOMIC-NEXT: move.b %d0, %d1
; ATOMIC-NEXT: bne .LBB12_1
; ATOMIC-NEXT: beq .LBB12_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
; ATOMIC-NEXT: adda.l #4, %sp
Expand Down Expand Up @@ -669,9 +680,10 @@ define i16 @atomicrmw_sub_i16_arid(ptr align 2 %self) {
; ATOMIC-NEXT: move.w %d0, %d2
; ATOMIC-NEXT: sub.w %d1, %d2
; ATOMIC-NEXT: seq %d1
; ATOMIC-NEXT: sub.b #1, %d1
; ATOMIC-NEXT: and.b #1, %d1
; ATOMIC-NEXT: cmpi.b #0, %d1
; ATOMIC-NEXT: move.w %d0, %d1
; ATOMIC-NEXT: bne .LBB13_1
; ATOMIC-NEXT: beq .LBB13_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
; ATOMIC-NEXT: adda.l #4, %sp
Expand Down Expand Up @@ -716,9 +728,10 @@ define i32 @atomicrmw_sub_i32_arid(ptr align 2 %self) {
; ATOMIC-NEXT: move.l %d0, %d2
; ATOMIC-NEXT: sub.l %d1, %d2
; ATOMIC-NEXT: seq %d1
; ATOMIC-NEXT: sub.b #1, %d1
; ATOMIC-NEXT: and.b #1, %d1
; ATOMIC-NEXT: cmpi.b #0, %d1
; ATOMIC-NEXT: move.l %d0, %d1
; ATOMIC-NEXT: bne .LBB14_1
; ATOMIC-NEXT: beq .LBB14_1
; ATOMIC-NEXT: ; %bb.2: ; %atomicrmw.end
; ATOMIC-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
; ATOMIC-NEXT: adda.l #4, %sp
Expand Down
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