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[X86] Fold (f16 bitcast extract_vectorelt(v,0)) to (extract_vectorelt (v8f16 bitcast(v,0))) #125877

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Merged
RKSimon merged 1 commit into from
Feb 6, 2025
Merged

[X86] Fold (f16 bitcast extract_vectorelt(v,0)) to (extract_vectorelt (v8f16 bitcast(v,0))) #125877

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13 changes: 13 additions & 0 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -45160,6 +45160,19 @@ static SDValue combineBitcast(SDNode *N, SelectionDAG &DAG,
}
}

// Attempt to peek through f16 bitcasted extractions hidden by truncation.
if (VT == MVT::f16 && SrcVT == MVT::i16) {
SDValue Src = peekThroughTruncates(N0);
if (Src.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
Src.getOperand(0).getValueSizeInBits() == 128 &&
isNullConstant(Src.getOperand(1))) {
SDLoc DL(N);
return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
DAG.getBitcast(MVT::v8f16, Src.getOperand(0)),
DAG.getVectorIdxConstant(0, DL));
}
}

// Since MMX types are special and don't usually play with other vector types,
// it's better to handle them early to be sure we emit efficient code by
// avoiding store-load conversions.
Expand Down
12 changes: 0 additions & 12 deletions llvm/test/CodeGen/X86/bfloat.ll
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Expand Up @@ -82,8 +82,6 @@ define bfloat @add2(bfloat %a, bfloat %b) nounwind {
; X86-NEXT: vmovd %eax, %xmm1
; X86-NEXT: vaddss %xmm0, %xmm1, %xmm0
; X86-NEXT: vcvtneps2bf16 %xmm0, %xmm0
; X86-NEXT: vmovw %xmm0, %eax
; X86-NEXT: vmovw %eax, %xmm0
; X86-NEXT: retl
;
; SSE2-LABEL: add2:
Expand All @@ -110,8 +108,6 @@ define bfloat @add2(bfloat %a, bfloat %b) nounwind {
; FP16-NEXT: vmovd %eax, %xmm1
; FP16-NEXT: vaddss %xmm0, %xmm1, %xmm0
; FP16-NEXT: vcvtneps2bf16 %xmm0, %xmm0
; FP16-NEXT: vmovw %xmm0, %eax
; FP16-NEXT: vmovw %eax, %xmm0
; FP16-NEXT: retq
;
; AVXNC-LABEL: add2:
Expand All @@ -124,8 +120,6 @@ define bfloat @add2(bfloat %a, bfloat %b) nounwind {
; AVXNC-NEXT: vmovd %eax, %xmm1
; AVXNC-NEXT: vaddss %xmm0, %xmm1, %xmm0
; AVXNC-NEXT: {vex} vcvtneps2bf16 %xmm0, %xmm0
; AVXNC-NEXT: vmovd %xmm0, %eax
; AVXNC-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
; AVXNC-NEXT: retq
%add = fadd bfloat %a, %b
ret bfloat %add
Expand Down Expand Up @@ -432,8 +426,6 @@ define bfloat @add_constant2(bfloat %a) nounwind {
; X86-NEXT: vmovd %eax, %xmm0
; X86-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vcvtneps2bf16 %xmm0, %xmm0
; X86-NEXT: vmovw %xmm0, %eax
; X86-NEXT: vmovw %eax, %xmm0
; X86-NEXT: retl
;
; SSE2-LABEL: add_constant2:
Expand All @@ -454,8 +446,6 @@ define bfloat @add_constant2(bfloat %a) nounwind {
; FP16-NEXT: vmovd %eax, %xmm0
; FP16-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; FP16-NEXT: vcvtneps2bf16 %xmm0, %xmm0
; FP16-NEXT: vmovw %xmm0, %eax
; FP16-NEXT: vmovw %eax, %xmm0
; FP16-NEXT: retq
;
; AVXNC-LABEL: add_constant2:
Expand All @@ -465,8 +455,6 @@ define bfloat @add_constant2(bfloat %a) nounwind {
; AVXNC-NEXT: vmovd %eax, %xmm0
; AVXNC-NEXT: vaddss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; AVXNC-NEXT: {vex} vcvtneps2bf16 %xmm0, %xmm0
; AVXNC-NEXT: vmovd %xmm0, %eax
; AVXNC-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
; AVXNC-NEXT: retq
%add = fadd bfloat %a, 1.0
ret bfloat %add
Expand Down
6 changes: 0 additions & 6 deletions llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
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Expand Up @@ -154,8 +154,6 @@ define half @complex_canonicalize_fmul_half(half %a, half %b) nounwind {
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vsubss %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vmovd %xmm0, %eax
; AVX512-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
; AVX512-NEXT: retq
entry:

Expand Down Expand Up @@ -239,15 +237,11 @@ define void @v_test_canonicalize_v2half(<2 x half> addrspace(1)* %out) nounwind
; AVX512-NEXT: vxorps %xmm3, %xmm3, %xmm3
; AVX512-NEXT: vblendps {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm2, %xmm2
; AVX512-NEXT: vmovd %xmm2, %eax
; AVX512-NEXT: vpinsrw $0, %eax, %xmm0, %xmm2
; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; AVX512-NEXT: vcvtph2ps %xmm0, %xmm0
; AVX512-NEXT: vmulss %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3]
; AVX512-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; AVX512-NEXT: vmovd %xmm0, %eax
; AVX512-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX512-NEXT: vmovd %xmm0, (%rdi)
; AVX512-NEXT: retq
Expand Down
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