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[X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping #125096

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Merged
merged 3 commits into from
Feb 3, 2025
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[X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping #125096

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c790757
[X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping
JaydeepChauhan14 Jan 30, 2025
065659e
Merge branch 'main' into gisel-lround-llround
JaydeepChauhan14 Jan 31, 2025
76f3405
Addressed the review comments1
JaydeepChauhan14 Jan 31, 2025
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6 changes: 6 additions & 0 deletions llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -411,6 +411,10 @@ static RTLIB::Libcall getRTLibDesc(unsigned Opcode, unsigned Size) {
} while (0)

switch (Opcode) {
case TargetOpcode::G_LROUND:
RTLIBCASE(LROUND_F);
case TargetOpcode::G_LLROUND:
RTLIBCASE(LLROUND_F);
case TargetOpcode::G_MUL:
RTLIBCASE_INT(MUL_I);
case TargetOpcode::G_SDIV:
Expand Down Expand Up @@ -1267,6 +1271,8 @@ LegalizerHelper::libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver) {
return Status;
break;
}
case TargetOpcode::G_LROUND:
case TargetOpcode::G_LLROUND:
case TargetOpcode::G_INTRINSIC_LRINT:
case TargetOpcode::G_INTRINSIC_LLRINT: {
LLT LLTy = MRI.getType(MI.getOperand(1).getReg());
Expand Down
4 changes: 4 additions & 0 deletions llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
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Expand Up @@ -99,6 +99,10 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.widenScalarToNextPow2(0, /*Min=*/8)
.clampScalar(0, s8, sMaxScalar);

getActionDefinitionsBuilder(G_LROUND).libcall();

getActionDefinitionsBuilder(G_LLROUND).libcall();

// merge/unmerge
for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
Expand Down
204 changes: 201 additions & 3 deletions llvm/test/CodeGen/X86/llround-conv.ll
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Original file line number Diff line number Diff line change
@@ -1,7 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE2
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64

define i64 @testmsxs(float %x) {
; X86-LABEL: testmsxs:
Expand All @@ -26,9 +28,29 @@ define i64 @testmsxs(float %x) {
; SSE2-NEXT: .cfi_def_cfa_offset 4
; SSE2-NEXT: retl
;
; GISEL-X86-LABEL: testmsxs:
; GISEL-X86: # %bb.0: # %entry
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: .cfi_def_cfa_offset 16
; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; GISEL-X86-NEXT: movl %eax, (%esp)
; GISEL-X86-NEXT: calll llroundf
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: .cfi_def_cfa_offset 4
; GISEL-X86-NEXT: retl
;
; X64-LABEL: testmsxs:
; X64: # %bb.0: # %entry
; X64-NEXT: jmp llroundf@PLT # TAILCALL
;
; GISEL-X64-LABEL: testmsxs:
; GISEL-X64: # %bb.0: # %entry
; GISEL-X64-NEXT: pushq %rax
; GISEL-X64-NEXT: .cfi_def_cfa_offset 16
; GISEL-X64-NEXT: callq llroundf
; GISEL-X64-NEXT: popq %rcx
; GISEL-X64-NEXT: .cfi_def_cfa_offset 8
; GISEL-X64-NEXT: retq
entry:
%0 = tail call i64 @llvm.llround.f32(float %x)
ret i64 %0
Expand Down Expand Up @@ -57,9 +79,34 @@ define i64 @testmsxd(double %x) {
; SSE2-NEXT: .cfi_def_cfa_offset 4
; SSE2-NEXT: retl
;
; GISEL-X86-LABEL: testmsxd:
; GISEL-X86: # %bb.0: # %entry
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: .cfi_def_cfa_offset 16
; GISEL-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GISEL-X86-NEXT: movl 4(%eax), %eax
; GISEL-X86-NEXT: xorl %edx, %edx
; GISEL-X86-NEXT: addl %esp, %edx
; GISEL-X86-NEXT: movl %ecx, (%esp)
; GISEL-X86-NEXT: movl %eax, 4(%edx)
; GISEL-X86-NEXT: calll llround
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: .cfi_def_cfa_offset 4
; GISEL-X86-NEXT: retl
;
; X64-LABEL: testmsxd:
; X64: # %bb.0: # %entry
; X64-NEXT: jmp llround@PLT # TAILCALL
;
; GISEL-X64-LABEL: testmsxd:
; GISEL-X64: # %bb.0: # %entry
; GISEL-X64-NEXT: pushq %rax
; GISEL-X64-NEXT: .cfi_def_cfa_offset 16
; GISEL-X64-NEXT: callq llround
; GISEL-X64-NEXT: popq %rcx
; GISEL-X64-NEXT: .cfi_def_cfa_offset 8
; GISEL-X64-NEXT: retq
entry:
%0 = tail call i64 @llvm.llround.f64(double %x)
ret i64 %0
Expand Down Expand Up @@ -88,14 +135,165 @@ define i64 @testmsll(x86_fp80 %x) {
; SSE2-NEXT: .cfi_def_cfa_offset 4
; SSE2-NEXT: retl
;
; GISEL-X86-LABEL: testmsll:
; GISEL-X86: # %bb.0: # %entry
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: .cfi_def_cfa_offset 16
; GISEL-X86-NEXT: fldt {{[0-9]+}}(%esp)
; GISEL-X86-NEXT: fstpt (%esp)
; GISEL-X86-NEXT: calll llroundl
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: .cfi_def_cfa_offset 4
; GISEL-X86-NEXT: retl
;
; X64-LABEL: testmsll:
; X64: # %bb.0: # %entry
; X64-NEXT: jmp llroundl@PLT # TAILCALL
;
; GISEL-X64-LABEL: testmsll:
; GISEL-X64: # %bb.0: # %entry
; GISEL-X64-NEXT: subq $24, %rsp
; GISEL-X64-NEXT: .cfi_def_cfa_offset 32
; GISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
; GISEL-X64-NEXT: fstpt (%rsp)
; GISEL-X64-NEXT: callq llroundl
; GISEL-X64-NEXT: addq $24, %rsp
; GISEL-X64-NEXT: .cfi_def_cfa_offset 8
; GISEL-X64-NEXT: retq
entry:
%0 = tail call i64 @llvm.llround.f80(x86_fp80 %x)
ret i64 %0
}

declare i64 @llvm.llround.f32(float) nounwind readnone
declare i64 @llvm.llround.f64(double) nounwind readnone
declare i64 @llvm.llround.f80(x86_fp80) nounwind readnone
define i64 @test_llround_i64_f32(float %x) nounwind {
; X86-LABEL: test_llround_i64_f32:
; X86: # %bb.0:
; X86-NEXT: pushl %eax
; X86-NEXT: flds {{[0-9]+}}(%esp)
; X86-NEXT: fstps (%esp)
; X86-NEXT: calll llroundf
; X86-NEXT: popl %ecx
; X86-NEXT: retl
;
; SSE2-LABEL: test_llround_i64_f32:
; SSE2: # %bb.0:
; SSE2-NEXT: pushl %eax
; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-NEXT: movss %xmm0, (%esp)
; SSE2-NEXT: calll llroundf
; SSE2-NEXT: popl %ecx
; SSE2-NEXT: retl
;
; GISEL-X86-LABEL: test_llround_i64_f32:
; GISEL-X86: # %bb.0:
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; GISEL-X86-NEXT: movl %eax, (%esp)
; GISEL-X86-NEXT: calll llroundf
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: retl
;
; X64-LABEL: test_llround_i64_f32:
; X64: # %bb.0:
; X64-NEXT: jmp llroundf@PLT # TAILCALL
;
; GISEL-X64-LABEL: test_llround_i64_f32:
; GISEL-X64: # %bb.0:
; GISEL-X64-NEXT: pushq %rax
; GISEL-X64-NEXT: callq llroundf
; GISEL-X64-NEXT: popq %rcx
; GISEL-X64-NEXT: retq
%conv = call i64 @llvm.llround.i64.f32(float %x)
ret i64 %conv
}

define i64 @test_llround_i64_f64(double %x) nounwind {
; X86-LABEL: test_llround_i64_f64:
; X86: # %bb.0:
; X86-NEXT: subl $8, %esp
; X86-NEXT: fldl {{[0-9]+}}(%esp)
; X86-NEXT: fstpl (%esp)
; X86-NEXT: calll llround
; X86-NEXT: addl $8, %esp
; X86-NEXT: retl
;
; SSE2-LABEL: test_llround_i64_f64:
; SSE2: # %bb.0:
; SSE2-NEXT: subl $8, %esp
; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; SSE2-NEXT: movsd %xmm0, (%esp)
; SSE2-NEXT: calll llround
; SSE2-NEXT: addl $8, %esp
; SSE2-NEXT: retl
;
; GISEL-X86-LABEL: test_llround_i64_f64:
; GISEL-X86: # %bb.0:
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GISEL-X86-NEXT: movl 4(%eax), %eax
; GISEL-X86-NEXT: xorl %edx, %edx
; GISEL-X86-NEXT: addl %esp, %edx
; GISEL-X86-NEXT: movl %ecx, (%esp)
; GISEL-X86-NEXT: movl %eax, 4(%edx)
; GISEL-X86-NEXT: calll llround
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: retl
;
; X64-LABEL: test_llround_i64_f64:
; X64: # %bb.0:
; X64-NEXT: jmp llround@PLT # TAILCALL
;
; GISEL-X64-LABEL: test_llround_i64_f64:
; GISEL-X64: # %bb.0:
; GISEL-X64-NEXT: pushq %rax
; GISEL-X64-NEXT: callq llround
; GISEL-X64-NEXT: popq %rcx
; GISEL-X64-NEXT: retq
%conv = call i64 @llvm.llround.i64.f64(double %x)
ret i64 %conv
}

define i64 @test_llround_i64_f80(x86_fp80 %x) nounwind {
; X86-LABEL: test_llround_i64_f80:
; X86: # %bb.0:
; X86-NEXT: subl $12, %esp
; X86-NEXT: fldt {{[0-9]+}}(%esp)
; X86-NEXT: fstpt (%esp)
; X86-NEXT: calll llroundl
; X86-NEXT: addl $12, %esp
; X86-NEXT: retl
;
; SSE2-LABEL: test_llround_i64_f80:
; SSE2: # %bb.0:
; SSE2-NEXT: subl $12, %esp
; SSE2-NEXT: fldt {{[0-9]+}}(%esp)
; SSE2-NEXT: fstpt (%esp)
; SSE2-NEXT: calll llroundl
; SSE2-NEXT: addl $12, %esp
; SSE2-NEXT: retl
;
; GISEL-X86-LABEL: test_llround_i64_f80:
; GISEL-X86: # %bb.0:
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: fldt {{[0-9]+}}(%esp)
; GISEL-X86-NEXT: fstpt (%esp)
; GISEL-X86-NEXT: calll llroundl
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: retl
;
; X64-LABEL: test_llround_i64_f80:
; X64: # %bb.0:
; X64-NEXT: jmp llroundl@PLT # TAILCALL
;
; GISEL-X64-LABEL: test_llround_i64_f80:
; GISEL-X64: # %bb.0:
; GISEL-X64-NEXT: subq $24, %rsp
; GISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
; GISEL-X64-NEXT: fstpt (%rsp)
; GISEL-X64-NEXT: callq llroundl
; GISEL-X64-NEXT: addq $24, %rsp
; GISEL-X64-NEXT: retq
%conv = call i64 @llvm.llround.i64.f80(x86_fp80 %x)
ret i64 %conv
}
67 changes: 60 additions & 7 deletions llvm/test/CodeGen/X86/lround-conv-i32.ll
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Original file line number Diff line number Diff line change
@@ -1,47 +1,100 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s
; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64

define i32 @testmsws(float %x) {
define i32 @testmsws(float %x) nounwind {
; CHECK-LABEL: testmsws:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: jmp lroundf # TAILCALL
;
; GISEL-X86-LABEL: testmsws:
; GISEL-X86: # %bb.0: # %entry
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; GISEL-X86-NEXT: movl %eax, (%esp)
; GISEL-X86-NEXT: calll lroundf
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: retl
;
; X64-LABEL: testmsws:
; X64: # %bb.0: # %entry
; X64-NEXT: jmp lroundf@PLT # TAILCALL
;
; GISEL-X64-LABEL: testmsws:
; GISEL-X64: # %bb.0: # %entry
; GISEL-X64-NEXT: pushq %rax
; GISEL-X64-NEXT: callq lroundf
; GISEL-X64-NEXT: popq %rcx
; GISEL-X64-NEXT: retq
entry:
%0 = tail call i32 @llvm.lround.i32.f32(float %x)
ret i32 %0
}

define i32 @testmswd(double %x) {
define i32 @testmswd(double %x) nounwind {
; CHECK-LABEL: testmswd:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: jmp lround # TAILCALL
;
; GISEL-X86-LABEL: testmswd:
; GISEL-X86: # %bb.0: # %entry
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: leal {{[0-9]+}}(%esp), %eax
; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GISEL-X86-NEXT: movl 4(%eax), %eax
; GISEL-X86-NEXT: xorl %edx, %edx
; GISEL-X86-NEXT: addl %esp, %edx
; GISEL-X86-NEXT: movl %ecx, (%esp)
; GISEL-X86-NEXT: movl %eax, 4(%edx)
; GISEL-X86-NEXT: calll lround
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: retl
;
; X64-LABEL: testmswd:
; X64: # %bb.0: # %entry
; X64-NEXT: jmp lround@PLT # TAILCALL
;
; GISEL-X64-LABEL: testmswd:
; GISEL-X64: # %bb.0: # %entry
; GISEL-X64-NEXT: pushq %rax
; GISEL-X64-NEXT: callq lround
; GISEL-X64-NEXT: popq %rcx
; GISEL-X64-NEXT: retq
entry:
%0 = tail call i32 @llvm.lround.i32.f64(double %x)
ret i32 %0
}

define i32 @testmsll(x86_fp80 %x) {
define i32 @testmsll(x86_fp80 %x) nounwind {
; CHECK-LABEL: testmsll:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: jmp lroundl # TAILCALL
;
; GISEL-X86-LABEL: testmsll:
; GISEL-X86: # %bb.0: # %entry
; GISEL-X86-NEXT: subl $12, %esp
; GISEL-X86-NEXT: fldt {{[0-9]+}}(%esp)
; GISEL-X86-NEXT: fstpt (%esp)
; GISEL-X86-NEXT: calll lroundl
; GISEL-X86-NEXT: addl $12, %esp
; GISEL-X86-NEXT: retl
;
; X64-LABEL: testmsll:
; X64: # %bb.0: # %entry
; X64-NEXT: jmp lroundl@PLT # TAILCALL
;
; GISEL-X64-LABEL: testmsll:
; GISEL-X64: # %bb.0: # %entry
; GISEL-X64-NEXT: subq $24, %rsp
; GISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp)
; GISEL-X64-NEXT: fstpt (%rsp)
; GISEL-X64-NEXT: callq lroundl
; GISEL-X64-NEXT: addq $24, %rsp
; GISEL-X64-NEXT: retq
entry:
%0 = tail call i32 @llvm.lround.i32.f80(x86_fp80 %x)
ret i32 %0
}

declare i32 @llvm.lround.i32.f32(float) nounwind readnone
declare i32 @llvm.lround.i32.f64(double) nounwind readnone
declare i32 @llvm.lround.i32.f80(x86_fp80) nounwind readnone
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