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28 changes: 28 additions & 0 deletions llvm/include/llvm/CodeGen/RegisterCoalescerPass.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
//===- llvm/CodeGen/RegisterCoalescerPass.h ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef LLVM_CODEGEN_REGISTER_COALESCERPASS_H
#define LLVM_CODEGEN_REGISTER_COALESCERPASS_H

#include "llvm/CodeGen/MachinePassManager.h"

namespace llvm {
class RegisterCoalescerPass : public PassInfoMixin<RegisterCoalescerPass> {
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);

MachineFunctionProperties getClearedProperties() const {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
Comment on lines +20 to +23
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I thought this didn't work in new PM?

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It does work; MFPropsModifier handles these methods as a RAII class (which I have missed to use in run(), I'll update that in a while)

};

} // namespace llvm

#endif // LLVM_CODEGEN_REGISTER_COALESCERPASS_H
2 changes: 1 addition & 1 deletion llvm/include/llvm/InitializePasses.h
Original file line number Diff line number Diff line change
Expand Up @@ -266,7 +266,7 @@ void initializeRegionOnlyPrinterPass(PassRegistry &);
void initializeRegionOnlyViewerPass(PassRegistry &);
void initializeRegionPrinterPass(PassRegistry &);
void initializeRegionViewerPass(PassRegistry &);
void initializeRegisterCoalescerPass(PassRegistry &);
void initializeRegisterCoalescerLegacyPass(PassRegistry &);
void initializeRemoveLoadsIntoFakeUsesPass(PassRegistry &);
void initializeRemoveRedundantDebugValuesPass(PassRegistry &);
void initializeRenameIndependentSubregsPass(PassRegistry &);
Expand Down
1 change: 1 addition & 0 deletions llvm/include/llvm/Passes/CodeGenPassBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,7 @@
#include "llvm/CodeGen/RegAllocFast.h"
#include "llvm/CodeGen/RegUsageInfoCollector.h"
#include "llvm/CodeGen/RegUsageInfoPropagate.h"
#include "llvm/CodeGen/RegisterCoalescerPass.h"
#include "llvm/CodeGen/RegisterUsageInfo.h"
#include "llvm/CodeGen/ReplaceWithVeclib.h"
#include "llvm/CodeGen/SafeStack.h"
Expand Down
2 changes: 1 addition & 1 deletion llvm/include/llvm/Passes/MachinePassRegistry.def
Original file line number Diff line number Diff line change
Expand Up @@ -164,6 +164,7 @@ MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(errs()))
MACHINE_FUNCTION_PASS("print<virtregmap>", VirtRegMapPrinterPass(errs()))
MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass())
MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass())
MACHINE_FUNCTION_PASS("register-coalescer", RegisterCoalescerPass())
MACHINE_FUNCTION_PASS("require-all-machine-function-properties",
RequireAllMachineFunctionPropertiesPass())
MACHINE_FUNCTION_PASS("stack-coloring", StackColoringPass())
Expand Down Expand Up @@ -265,7 +266,6 @@ DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugVa
DUMMY_MACHINE_FUNCTION_PASS("rename-independent-subregs", RenameIndependentSubregsPass)
DUMMY_MACHINE_FUNCTION_PASS("reset-machine-function", ResetMachineFunctionPass)
DUMMY_MACHINE_FUNCTION_PASS("shrink-wrap", ShrinkWrapPass)
DUMMY_MACHINE_FUNCTION_PASS("simple-register-coalescing", RegisterCoalescerPass)
DUMMY_MACHINE_FUNCTION_PASS("stack-frame-layout", StackFrameLayoutAnalysisPass)
DUMMY_MACHINE_FUNCTION_PASS("stack-slot-coloring", StackSlotColoringPass)
DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass)
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/CodeGen.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeRegAllocFastPass(Registry);
initializeRegUsageInfoCollectorLegacyPass(Registry);
initializeRegUsageInfoPropagationLegacyPass(Registry);
initializeRegisterCoalescerPass(Registry);
initializeRegisterCoalescerLegacyPass(Registry);
initializeRemoveLoadsIntoFakeUsesPass(Registry);
initializeRemoveRedundantDebugValuesPass(Registry);
initializeRenameIndependentSubregsPass(Registry);
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/RegAllocBasic.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -134,7 +134,7 @@ INITIALIZE_PASS_BEGIN(RABasic, "regallocbasic", "Basic Register Allocator",
INITIALIZE_PASS_DEPENDENCY(LiveDebugVariablesWrapperLegacy)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer)
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescerLegacy)
INITIALIZE_PASS_DEPENDENCY(MachineScheduler)
INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/RegAllocGreedy.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -154,7 +154,7 @@ INITIALIZE_PASS_BEGIN(RAGreedy, "greedy",
INITIALIZE_PASS_DEPENDENCY(LiveDebugVariablesWrapperLegacy)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescer)
INITIALIZE_PASS_DEPENDENCY(RegisterCoalescerLegacy)
INITIALIZE_PASS_DEPENDENCY(MachineScheduler)
INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
Expand Down
78 changes: 56 additions & 22 deletions llvm/lib/CodeGen/RegisterCoalescer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -24,15 +24,18 @@
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveRangeEdit.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/RegisterCoalescerPass.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
Expand Down Expand Up @@ -121,13 +124,13 @@ namespace {

class JoinVals;

class RegisterCoalescer : public MachineFunctionPass,
private LiveRangeEdit::Delegate {
class RegisterCoalescer : private LiveRangeEdit::Delegate {
MachineFunction *MF = nullptr;
MachineRegisterInfo *MRI = nullptr;
const TargetRegisterInfo *TRI = nullptr;
const TargetInstrInfo *TII = nullptr;
LiveIntervals *LIS = nullptr;
SlotIndexes *SI = nullptr;
const MachineLoopInfo *Loops = nullptr;
RegisterClassInfo RegClassInfo;

Expand Down Expand Up @@ -372,11 +375,24 @@ class RegisterCoalescer : public MachineFunctionPass,
void checkMergingChangesDbgValuesImpl(Register Reg, LiveRange &OtherRange,
LiveRange &RegRange, JoinVals &Vals2);

public:
// For legacy pass only.
RegisterCoalescer() {}
RegisterCoalescer &operator=(RegisterCoalescer &&Other) = default;

RegisterCoalescer(LiveIntervals *LIS, SlotIndexes *SI,
const MachineLoopInfo *Loops)
: LIS(LIS), SI(SI), Loops(Loops) {}

bool run(MachineFunction &MF);
};

class RegisterCoalescerLegacy : public MachineFunctionPass {
public:
static char ID; ///< Class identification, replacement for typeinfo

RegisterCoalescer() : MachineFunctionPass(ID) {
initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
RegisterCoalescerLegacy() : MachineFunctionPass(ID) {
initializeRegisterCoalescerLegacyPass(*PassRegistry::getPassRegistry());
}

void getAnalysisUsage(AnalysisUsage &AU) const override;
Expand All @@ -386,24 +402,22 @@ class RegisterCoalescer : public MachineFunctionPass,
MachineFunctionProperties::Property::IsSSA);
}

void releaseMemory() override;

/// This is the pass entry point.
bool runOnMachineFunction(MachineFunction &) override;
};

} // end anonymous namespace

char RegisterCoalescer::ID = 0;
char RegisterCoalescerLegacy::ID = 0;

char &llvm::RegisterCoalescerID = RegisterCoalescer::ID;
char &llvm::RegisterCoalescerID = RegisterCoalescerLegacy::ID;

INITIALIZE_PASS_BEGIN(RegisterCoalescer, "register-coalescer",
INITIALIZE_PASS_BEGIN(RegisterCoalescerLegacy, "register-coalescer",
"Register Coalescer", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_END(RegisterCoalescer, "register-coalescer",
INITIALIZE_PASS_END(RegisterCoalescerLegacy, "register-coalescer",
"Register Coalescer", false, false)

[[nodiscard]] static bool isMoveInstr(const TargetRegisterInfo &tri,
Expand Down Expand Up @@ -580,8 +594,9 @@ bool CoalescerPair::isCoalescable(const MachineInstr *MI) const {
}
}

void RegisterCoalescer::getAnalysisUsage(AnalysisUsage &AU) const {
void RegisterCoalescerLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addUsedIfAvailable<SlotIndexesWrapperPass>();
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addPreserved<LiveIntervalsWrapperPass>();
AU.addPreserved<SlotIndexesWrapperPass>();
Expand Down Expand Up @@ -4226,15 +4241,35 @@ void RegisterCoalescer::joinAllIntervals() {
lateLiveIntervalUpdate();
}

void RegisterCoalescer::releaseMemory() {
ErasedInstrs.clear();
WorkList.clear();
DeadDefs.clear();
InflateRegs.clear();
LargeLIVisitCounter.clear();
PreservedAnalyses
RegisterCoalescerPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
MFPropsModifier _(*this, MF);
auto &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF);
auto &Loops = MFAM.getResult<MachineLoopAnalysis>(MF);
auto *SI = MFAM.getCachedResult<SlotIndexesAnalysis>(MF);
RegisterCoalescer Impl(&LIS, SI, &Loops);
if (!Impl.run(MF))
return PreservedAnalyses::all();
auto PA = getMachineFunctionPassPreservedAnalyses();
PA.preserveSet<CFGAnalyses>();
PA.preserve<LiveIntervalsAnalysis>();
PA.preserve<SlotIndexesAnalysis>();
PA.preserve<MachineLoopAnalysis>();
PA.preserve<MachineDominatorTreeAnalysis>();
return PA;
}

bool RegisterCoalescerLegacy::runOnMachineFunction(MachineFunction &MF) {
auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
auto *Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
auto *SIWrapper = getAnalysisIfAvailable<SlotIndexesWrapperPass>();
SlotIndexes *SI = SIWrapper ? &SIWrapper->getSI() : nullptr;
RegisterCoalescer Impl(LIS, SI, Loops);
return Impl.run(MF);
}

bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
bool RegisterCoalescer::run(MachineFunction &fn) {
LLVM_DEBUG(dbgs() << "********** REGISTER COALESCER **********\n"
<< "********** Function: " << fn.getName() << '\n');

Expand All @@ -4257,8 +4292,6 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
const TargetSubtargetInfo &STI = fn.getSubtarget();
TRI = STI.getRegisterInfo();
TII = STI.getInstrInfo();
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
if (EnableGlobalCopies == cl::BOU_UNSET)
JoinGlobalCopies = STI.enableJoinGlobalCopies();
else
Expand All @@ -4283,7 +4316,7 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
JoinSplitEdges = EnableJoinSplits;

if (VerifyCoalescing)
MF->verify(this, "Before register coalescing", &errs());
MF->verify(LIS, SI, "Before register coalescing", &errs());

DbgVRegToValues.clear();
buildVRegToDbgValueMap(fn);
Expand Down Expand Up @@ -4342,7 +4375,8 @@ bool RegisterCoalescer::runOnMachineFunction(MachineFunction &fn) {
RegToPHIIdx.clear();

LLVM_DEBUG(LIS->dump());

if (VerifyCoalescing)
MF->verify(this, "After register coalescing", &errs());
MF->verify(LIS, SI, "After register coalescing", &errs());
return true;
}
1 change: 1 addition & 0 deletions llvm/lib/CodeGen/RegisterCoalescer.h
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@
#ifndef LLVM_LIB_CODEGEN_REGISTERCOALESCER_H
#define LLVM_LIB_CODEGEN_REGISTERCOALESCER_H

#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/Register.h"

namespace llvm {
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/Passes/PassBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,7 @@
#include "llvm/CodeGen/RegAllocFast.h"
#include "llvm/CodeGen/RegUsageInfoCollector.h"
#include "llvm/CodeGen/RegUsageInfoPropagate.h"
#include "llvm/CodeGen/RegisterCoalescerPass.h"
#include "llvm/CodeGen/RegisterUsageInfo.h"
#include "llvm/CodeGen/SafeStack.h"
#include "llvm/CodeGen/SelectOptimize.h"
Expand Down
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=arm64-apple-macosx -mcpu=apple-m1 -verify-coalescing -run-pass=register-coalescer -o - %s | FileCheck %s
# RUN: llc -mtriple=arm64-apple-macosx -mcpu=apple-m1 -verify-coalescing -passes=register-coalescer -o - %s | FileCheck %s

# Hits assert "Trying to add an operand to a machine instr that is
# already done!" when rematerializing during greedy. This was because
Expand Down
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=register-coalescer -verify-coalescing -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -passes=register-coalescer -verify-coalescing -o - %s | FileCheck %s

# Testcase variants from
# liveout-implicit-def-subreg-redef-blender-verifier-error.mir which
Expand Down
1 change: 1 addition & 0 deletions llvm/test/CodeGen/X86/coalesce-dead-lanes.mir
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
# RUN: llc -run-pass register-coalescer -O0 -mtriple x86_64-pc-linux-gnu -o - %s | FileCheck %s
# RUN: llc -passes register-coalescer -O0 -mtriple x86_64-pc-linux-gnu -o - %s | FileCheck %s

---
name: foo
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/late-remat-update.mir
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# REQUIRES: asserts
# RUN: llc -mtriple=x86_64-- -run-pass=register-coalescer -late-remat-update-threshold=1 -stats %s -o /dev/null 2>&1 | FileCheck %s
# RUN: llc -mtriple=x86_64-- -passes=register-coalescer -late-remat-update-threshold=1 -stats %s -o /dev/null 2>&1 | FileCheck %s
# Check the test will rematerialize for three copies, but will call shrinkToUses
# only once to update live range because of late rematerialization update.
# CHECK: 3 regalloc - Number of instructions re-materialized
Expand Down