[Xtensa] Move XtensaUtils to MCTargetDesc #123969
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@llvm/pr-subscribers-backend-xtensa Author: Fangrui Song (MaskRay) ChangesPR #121118 attempted to introduce Full diff: https://github.com/llvm/llvm-project/pull/123969.diff 8 Files Affected:
diff --git a/llvm/lib/Target/Xtensa/CMakeLists.txt b/llvm/lib/Target/Xtensa/CMakeLists.txt
index 726efadc87c0b2..4fc1ba6dfa6504 100644
--- a/llvm/lib/Target/Xtensa/CMakeLists.txt
+++ b/llvm/lib/Target/Xtensa/CMakeLists.txt
@@ -24,7 +24,6 @@ add_llvm_target(XtensaCodeGen
XtensaRegisterInfo.cpp
XtensaSubtarget.cpp
XtensaTargetMachine.cpp
- XtensaUtils.cpp
LINK_COMPONENTS
AsmPrinter
diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
index 2653c293dc0c4f..fc23c2356825f3 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp
@@ -32,6 +32,48 @@
using namespace llvm;
+bool Xtensa::isValidAddrOffset(int Scale, int64_t OffsetVal) {
+ bool Valid = false;
+
+ switch (Scale) {
+ case 1:
+ Valid = (OffsetVal >= 0 && OffsetVal <= 255);
+ break;
+ case 2:
+ Valid = (OffsetVal >= 0 && OffsetVal <= 510) && ((OffsetVal & 0x1) == 0);
+ break;
+ case 4:
+ Valid = (OffsetVal >= 0 && OffsetVal <= 1020) && ((OffsetVal & 0x3) == 0);
+ break;
+ default:
+ break;
+ }
+ return Valid;
+}
+
+bool Xtensa::isValidAddrOffsetForOpcode(unsigned Opcode, int64_t Offset) {
+ int Scale = 0;
+
+ switch (Opcode) {
+ case Xtensa::L8UI:
+ case Xtensa::S8I:
+ Scale = 1;
+ break;
+ case Xtensa::L16SI:
+ case Xtensa::L16UI:
+ case Xtensa::S16I:
+ Scale = 2;
+ break;
+ case Xtensa::LEA_ADD:
+ return (Offset >= -128 && Offset <= 127);
+ default:
+ // assume that MI is 32-bit load/store operation
+ Scale = 4;
+ break;
+ }
+ return isValidAddrOffset(Scale, Offset);
+}
+
static MCAsmInfo *createXtensaMCAsmInfo(const MCRegisterInfo &MRI,
const Triple &TT,
const MCTargetOptions &Options) {
diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h
index 0e075be0df07fe..6be54867d84a73 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h
@@ -28,6 +28,7 @@ class MCObjectWriter;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCTargetOptions;
+class MachineInstr;
class StringRef;
class Target;
class raw_ostream;
@@ -43,6 +44,15 @@ MCAsmBackend *createXtensaMCAsmBackend(const Target &T,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectTargetWriter>
createXtensaObjectWriter(uint8_t OSABI, bool IsLittleEndian);
+
+namespace Xtensa {
+// Check address offset for load/store instructions.
+// The offset should be multiple of scale.
+bool isValidAddrOffset(int Scale, int64_t OffsetVal);
+
+// Check address offset for load/store instructions.
+bool isValidAddrOffsetForOpcode(unsigned Opcode, int64_t Offset);
+} // namespace Xtensa
} // end namespace llvm
// Defines symbolic names for Xtensa registers.
diff --git a/llvm/lib/Target/Xtensa/Utils/CMakeLists.txt b/llvm/lib/Target/Xtensa/Utils/CMakeLists.txt
new file mode 100644
index 00000000000000..011bf12ea31d60
--- /dev/null
+++ b/llvm/lib/Target/Xtensa/Utils/CMakeLists.txt
@@ -0,0 +1,10 @@
+add_llvm_component_library(LLVMXtensaUtils
+ XtensaBaseInfo.cpp
+
+ LINK_COMPONENTS
+ Support
+ Core
+
+ ADD_TO_COMPONENT
+ Xtensa
+ )
diff --git a/llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp b/llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
index ef14095d18efbf..06cccd4831bfcd 100644
--- a/llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
@@ -10,9 +10,9 @@
//
//===----------------------------------------------------------------------===//
+#include "MCTargetDesc/XtensaMCTargetDesc.h"
#include "Xtensa.h"
#include "XtensaTargetMachine.h"
-#include "XtensaUtils.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
@@ -75,7 +75,7 @@ class XtensaDAGToDAGISel : public SelectionDAGISel {
ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1));
int64_t OffsetVal = CN->getSExtValue();
- Valid = isValidAddrOffset(Scale, OffsetVal);
+ Valid = Xtensa::isValidAddrOffset(Scale, OffsetVal);
if (Valid) {
// If the first operand is a FI, get the TargetFI Node.
diff --git a/llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp b/llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
index bced2d4ad0095b..4a8bafc540df0d 100644
--- a/llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
@@ -11,9 +11,9 @@
//===----------------------------------------------------------------------===//
#include "XtensaRegisterInfo.h"
+#include "MCTargetDesc/XtensaMCTargetDesc.h"
#include "XtensaInstrInfo.h"
#include "XtensaSubtarget.h"
-#include "XtensaUtils.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -99,7 +99,7 @@ bool XtensaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int64_t Offset =
SPOffset + (int64_t)StackSize + MI.getOperand(FIOperandNum + 1).getImm();
- bool Valid = isValidAddrOffset(MI, Offset);
+ bool Valid = Xtensa::isValidAddrOffsetForOpcode(MI.getOpcode(), Offset);
// If MI is not a debug value, make sure Offset fits in the 16-bit immediate
// field.
diff --git a/llvm/lib/Target/Xtensa/XtensaUtils.cpp b/llvm/lib/Target/Xtensa/XtensaUtils.cpp
deleted file mode 100644
index 98e424f6ea4406..00000000000000
--- a/llvm/lib/Target/Xtensa/XtensaUtils.cpp
+++ /dev/null
@@ -1,59 +0,0 @@
-//===--- XtensaUtils.cpp ---- Xtensa Utility Functions ----------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains miscellaneous utility functions.
-//
-//===----------------------------------------------------------------------===//
-
-#include "XtensaUtils.h"
-
-namespace llvm {
-
-bool isValidAddrOffset(int Scale, int64_t OffsetVal) {
- bool Valid = false;
-
- switch (Scale) {
- case 1:
- Valid = (OffsetVal >= 0 && OffsetVal <= 255);
- break;
- case 2:
- Valid = (OffsetVal >= 0 && OffsetVal <= 510) && ((OffsetVal & 0x1) == 0);
- break;
- case 4:
- Valid = (OffsetVal >= 0 && OffsetVal <= 1020) && ((OffsetVal & 0x3) == 0);
- break;
- default:
- break;
- }
- return Valid;
-}
-
-bool isValidAddrOffset(MachineInstr &MI, int64_t Offset) {
- int Scale = 0;
-
- switch (MI.getOpcode()) {
- case Xtensa::L8UI:
- case Xtensa::S8I:
- Scale = 1;
- break;
- case Xtensa::L16SI:
- case Xtensa::L16UI:
- case Xtensa::S16I:
- Scale = 2;
- break;
- case Xtensa::LEA_ADD:
- return (Offset >= -128 && Offset <= 127);
- default:
- // assume that MI is 32-bit load/store operation
- Scale = 4;
- break;
- }
- return isValidAddrOffset(Scale, Offset);
-}
-
-} // namespace llvm
diff --git a/llvm/lib/Target/Xtensa/XtensaUtils.h b/llvm/lib/Target/Xtensa/XtensaUtils.h
deleted file mode 100644
index 2b0ac37a6971a1..00000000000000
--- a/llvm/lib/Target/Xtensa/XtensaUtils.h
+++ /dev/null
@@ -1,27 +0,0 @@
-//===--- XtensaUtils.h ---- Xtensa Utility Functions ------------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This file contains miscellaneous utility functions.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_XTENSA_XTENSAUTILS_H
-#define LLVM_LIB_TARGET_XTENSA_XTENSAUTILS_H
-
-#include "XtensaInstrInfo.h"
-#include "llvm/CodeGen/MachineInstr.h"
-
-namespace llvm {
-// Check address offset for load/store instructions.
-// The offset should be multiple of scale.
-bool isValidAddrOffset(int Scale, int64_t OffsetVal);
-
-// Check address offset for load/store instructions.
-bool isValidAddrOffset(MachineInstr &MI, int64_t Offset);
-} // namespace llvm
-#endif // LLVM_LIB_TARGET_XTENSA_XTENSAUTILS_H
|
arsenm
approved these changes
Jan 25, 2025
MaskRay
deleted the
users/MaskRay/spr/xtensa-move-xtensautils-to-mctargetdesc
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Jan 26, 2025
PR #121118 attempted to introduce `checkRegister` used by XtensaDisassembler. Since `checkRegister` and other functions in XtensaUtils.cpp cannot link against XtensaCodeGen, move them to XtensaDesc, which can be used by XtensaDisassembler. Pull Request: llvm/llvm-project#123969
|
@MaskRay , thank you very much for this fix! |
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PR #121118 attempted to introduce
checkRegisterused byXtensaDisassembler. Since
checkRegisterand other functions inXtensaUtils.cpp cannot link against XtensaCodeGen, move them to
XtensaDesc, which can be used by XtensaDisassembler.