-
Notifications
You must be signed in to change notification settings - Fork 13.5k
[CodeGen] Use cached version of getRegPressureSetLimit #119194
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
Created using spr 1.3.6-beta.1
Why do we need #118787 if we can just update the passes to use RegisterClassInfo? |
Because the APIs are messy and confusing, we don't know if there will be some future users that use the raw limit directly. |
Created using spr 1.3.6-beta.1
@llvm/pr-subscribers-backend-arm Author: Pengcheng Wang (wangpc-pp) ChangesTo reduce compile time. This is a follow-up of #118787. Full diff: https://github.com/llvm/llvm-project/pull/119194.diff 5 Files Affected:
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index d21059189b1844..8aaa5605f28b70 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -123,6 +123,7 @@ namespace {
const TargetRegisterInfo *TRI = nullptr;
const MachineFrameInfo *MFI = nullptr;
MachineRegisterInfo *MRI = nullptr;
+ RegisterClassInfo RegClassInfo;
TargetSchedModel SchedModel;
bool PreRegAlloc = false;
bool HasProfileData = false;
@@ -389,6 +390,7 @@ bool MachineLICMImpl::run(MachineFunction &MF) {
MFI = &MF.getFrameInfo();
MRI = &MF.getRegInfo();
SchedModel.init(&ST);
+ RegClassInfo.runOnMachineFunction(MF);
HasProfileData = MF.getFunction().hasProfileData();
@@ -405,7 +407,7 @@ bool MachineLICMImpl::run(MachineFunction &MF) {
std::fill(RegPressure.begin(), RegPressure.end(), 0);
RegLimit.resize(NumRPS);
for (unsigned i = 0, e = NumRPS; i != e; ++i)
- RegLimit[i] = TRI->getRegPressureSetLimit(MF, i);
+ RegLimit[i] = RegClassInfo.getRegPressureSetLimit(i);
}
if (HoistConstLoads)
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 3ee0ba1fea5079..e2bbebfc5f5462 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1326,7 +1326,7 @@ class HighRegisterPressureDetector {
// Calculate the upper limit of each pressure set
void computePressureSetLimit(const RegisterClassInfo &RCI) {
for (unsigned PSet = 0; PSet < PSetNum; PSet++)
- PressureSetLimit[PSet] = TRI->getRegPressureSetLimit(MF, PSet);
+ PressureSetLimit[PSet] = RCI.getRegPressureSetLimit(PSet);
}
// There are two patterns of last-use.
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 7d0bedab7cdabc..d407d8a965ea67 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -1094,7 +1094,7 @@ bool MachineSinking::registerPressureSetExceedsLimit(
std::vector<unsigned> BBRegisterPressure = getBBRegisterPressure(MBB);
for (; *PS != -1; PS++)
if (Weight + BBRegisterPressure[*PS] >=
- TRI->getRegPressureSetLimit(*MBB.getParent(), *PS))
+ RegClassInfo.getRegPressureSetLimit(*PS))
return true;
return false;
}
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index e6b37dd9161685..8673deddb7057f 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -6936,7 +6936,6 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD,
RegClassInfo.runOnMachineFunction(*MF);
RPTracker.init(MF, &RegClassInfo, nullptr, EndLoop->getParent(),
EndLoop->getParent()->end(), false, false);
- const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
bumpCrossIterationPressure(RPTracker, CrossIterationNeeds);
@@ -6979,7 +6978,7 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD,
auto &P = RPTracker.getPressure().MaxSetPressure;
for (unsigned I = 0, E = P.size(); I < E; ++I)
- if (P[I] > TRI->getRegPressureSetLimit(*MF, I)) {
+ if (P[I] > RegClassInfo.getRegPressureSetLimit(I)) {
return true;
}
return false;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 44f6db5061e21a..fa45a7fb7fabe6 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -643,8 +643,8 @@ bool PPCInstrInfo::shouldReduceRegisterPressure(
};
// For now we only care about float and double type fma.
- unsigned VSSRCLimit = TRI->getRegPressureSetLimit(
- *MBB->getParent(), PPC::RegisterPressureSets::VSSRC);
+ unsigned VSSRCLimit =
+ RegClassInfo->getRegPressureSetLimit(PPC::RegisterPressureSets::VSSRC);
// Only reduce register pressure when pressure is high.
return GetMBBPressure(MBB)[PPC::RegisterPressureSets::VSSRC] >
|
@llvm/pr-subscribers-backend-powerpc Author: Pengcheng Wang (wangpc-pp) ChangesTo reduce compile time. This is a follow-up of #118787. Full diff: https://github.com/llvm/llvm-project/pull/119194.diff 5 Files Affected:
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index d21059189b1844..8aaa5605f28b70 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -123,6 +123,7 @@ namespace {
const TargetRegisterInfo *TRI = nullptr;
const MachineFrameInfo *MFI = nullptr;
MachineRegisterInfo *MRI = nullptr;
+ RegisterClassInfo RegClassInfo;
TargetSchedModel SchedModel;
bool PreRegAlloc = false;
bool HasProfileData = false;
@@ -389,6 +390,7 @@ bool MachineLICMImpl::run(MachineFunction &MF) {
MFI = &MF.getFrameInfo();
MRI = &MF.getRegInfo();
SchedModel.init(&ST);
+ RegClassInfo.runOnMachineFunction(MF);
HasProfileData = MF.getFunction().hasProfileData();
@@ -405,7 +407,7 @@ bool MachineLICMImpl::run(MachineFunction &MF) {
std::fill(RegPressure.begin(), RegPressure.end(), 0);
RegLimit.resize(NumRPS);
for (unsigned i = 0, e = NumRPS; i != e; ++i)
- RegLimit[i] = TRI->getRegPressureSetLimit(MF, i);
+ RegLimit[i] = RegClassInfo.getRegPressureSetLimit(i);
}
if (HoistConstLoads)
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 3ee0ba1fea5079..e2bbebfc5f5462 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1326,7 +1326,7 @@ class HighRegisterPressureDetector {
// Calculate the upper limit of each pressure set
void computePressureSetLimit(const RegisterClassInfo &RCI) {
for (unsigned PSet = 0; PSet < PSetNum; PSet++)
- PressureSetLimit[PSet] = TRI->getRegPressureSetLimit(MF, PSet);
+ PressureSetLimit[PSet] = RCI.getRegPressureSetLimit(PSet);
}
// There are two patterns of last-use.
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 7d0bedab7cdabc..d407d8a965ea67 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -1094,7 +1094,7 @@ bool MachineSinking::registerPressureSetExceedsLimit(
std::vector<unsigned> BBRegisterPressure = getBBRegisterPressure(MBB);
for (; *PS != -1; PS++)
if (Weight + BBRegisterPressure[*PS] >=
- TRI->getRegPressureSetLimit(*MBB.getParent(), *PS))
+ RegClassInfo.getRegPressureSetLimit(*PS))
return true;
return false;
}
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index e6b37dd9161685..8673deddb7057f 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -6936,7 +6936,6 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD,
RegClassInfo.runOnMachineFunction(*MF);
RPTracker.init(MF, &RegClassInfo, nullptr, EndLoop->getParent(),
EndLoop->getParent()->end(), false, false);
- const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
bumpCrossIterationPressure(RPTracker, CrossIterationNeeds);
@@ -6979,7 +6978,7 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD,
auto &P = RPTracker.getPressure().MaxSetPressure;
for (unsigned I = 0, E = P.size(); I < E; ++I)
- if (P[I] > TRI->getRegPressureSetLimit(*MF, I)) {
+ if (P[I] > RegClassInfo.getRegPressureSetLimit(I)) {
return true;
}
return false;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 44f6db5061e21a..fa45a7fb7fabe6 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -643,8 +643,8 @@ bool PPCInstrInfo::shouldReduceRegisterPressure(
};
// For now we only care about float and double type fma.
- unsigned VSSRCLimit = TRI->getRegPressureSetLimit(
- *MBB->getParent(), PPC::RegisterPressureSets::VSSRC);
+ unsigned VSSRCLimit =
+ RegClassInfo->getRegPressureSetLimit(PPC::RegisterPressureSets::VSSRC);
// Only reduce register pressure when pressure is high.
return GetMBBPressure(MBB)[PPC::RegisterPressureSets::VSSRC] >
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
LGTM for the target-independent changes.
@@ -123,6 +123,7 @@ namespace { | |||
const TargetRegisterInfo *TRI = nullptr; | |||
const MachineFrameInfo *MFI = nullptr; | |||
MachineRegisterInfo *MRI = nullptr; | |||
RegisterClassInfo RegClassInfo; |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The way RegisterClassInfo is currently used, it gets recomputed for every pass that uses it. It should probably move to be a normal analysis
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I was thinking this, especially as it has some saved state to work out when it needs to recompute. I think that's probably a good follow-up?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Relatedly, we also do not serialize the set of reserved registers in MIR
closed as it has been splitted into several small patches. |
To reduce compile time.
This is a follow-up of #118787.