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22 changes: 0 additions & 22 deletions llvm/lib/CodeGen/RegisterCoalescer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1374,27 +1374,6 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
MachineInstr &NewMI = *std::prev(MII);
NewMI.setDebugLoc(DL);

// In a situation like the following:
//
// undef %2.subreg:reg = INST %1:reg ; DefMI (rematerializable),
// ; DefSubIdx = subreg
// %3:reg = COPY %2 ; SrcIdx = DstIdx = 0
// .... = SOMEINSTR %3:reg
//
// there are no subranges for %3 so after rematerialization we need
// to explicitly create them. Undefined subranges are removed later on.
if (DstReg.isVirtual() && DefSubIdx && !CP.getSrcIdx() && !CP.getDstIdx() &&
MRI->shouldTrackSubRegLiveness(DstReg)) {
LiveInterval &DstInt = LIS->getInterval(DstReg);
if (!DstInt.hasSubRanges()) {
LaneBitmask FullMask = MRI->getMaxLaneMaskForVReg(DstReg);
LaneBitmask UsedLanes = TRI->getSubRegIndexLaneMask(DefSubIdx);
LaneBitmask UnusedLanes = FullMask & ~UsedLanes;
DstInt.createSubRangeFrom(LIS->getVNInfoAllocator(), UsedLanes, DstInt);
DstInt.createSubRangeFrom(LIS->getVNInfoAllocator(), UnusedLanes, DstInt);
}
}

// In a situation like the following:
// %0:subreg = instr ; DefMI, subreg = DstIdx
// %1 = copy %0:subreg ; CopyMI, SrcIdx = 0
Expand Down Expand Up @@ -1507,7 +1486,6 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
NewRC = TRI->getCommonSubClass(NewRC, DefRC);
assert(NewRC && "subreg chosen for remat incompatible with instruction");
}

// Remap subranges to new lanemask and change register class.
LiveInterval &DstInt = LIS->getInterval(DstReg);
for (LiveInterval::SubRange &SR : DstInt.subranges()) {
Expand Down

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