[AMDGPU] Fix typo in promoteUniformOpToI32

[Pierre-vh]

No description provided.

[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

Author: Pierre van Houtryve (Pierre-vh)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/109942.diff

1 Files Affected:

• (modified) llvm/lib/Target/AMDGPU/SIISelLowering.cpp (+1-2)

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 08f2ff4566b674..2464361d4eece3 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -6797,8 +6797,7 @@ SDValue SITargetLowering::promoteUniformOpToI32(SDValue Op,
   LHS = DAG.getNode(ExtOp, DL, ExtTy, {LHS});
 
   // Special case: for shifts, the RHS always needs a zext.
-  if (Op.getOpcode() == ISD::SRA || Op.getOpcode() == ISD::SRL ||
-      Op.getOpcode() == ISD::SRA)
+  if (Opc == ISD::SHL || Opc == ISD::SRL || Opc == ISD::SRA)
     RHS = DAG.getNode(ISD::ZERO_EXTEND, DL, ExtTy, {RHS});
   else
     RHS = DAG.getNode(ExtOp, DL, ExtTy, {RHS});

[arsenm]

Missing test?

[Pierre-vh]

There were no test updates, we either don't have the coverage or this somehow didn't cause any issue due to something else taking care of it?

[arsenm]

There were no test updates, we either don't have the coverage or this somehow didn't cause any issue due to something else taking care of it?

I assume there's missing test coverage

[Pierre-vh]

I don't have time to look at adding tests right now as I'll be OOO for the rest of the week, so I opened an issue to keep track of it: #109956