[RISCV] MachineScheduler.cpp:1368: updatePressureDiffs assertion failure

[preames]

Reduce test case for a crash observed in an LTO build of spec2017 namd. This is a newish failure, but not new. I waited a bit before bothering to reduce this under the hopes that the triggering change would be reverted.

@fpetrogalli I'm guessing this is related to your large rewrite, but haven't yet confirmed that.

$ llc < hand-reduced.ll 
	.text
	.attribute	4, 16
	.attribute	5, "rv64i2p1"
	.file	"<stdin>"
llc: ../llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:1368: void llvm::ScheduleDAGMILive::updatePressureDiffs(llvm::ArrayRef<llvm::RegisterMaskPair>): Assertion `VNI && "No live value at use."' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: /home/preames/llvm-dev/llvm-project/llvm/llc
1.	Running pass 'Function Pass Manager' on module '<stdin>'.
2.	Running pass 'Machine Instruction Scheduler' on function '@test'
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0  llc       0x0000557d99f08b70 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) + 240
1  llc       0x0000557d99f05f7f llvm::sys::RunSignalHandlers() + 47
2  llc       0x0000557d99f060d5
3  libc.so.6 0x00007fb8ece42520
4  libc.so.6 0x00007fb8ece969fc pthread_kill + 300
5  libc.so.6 0x00007fb8ece42476 raise + 22
6  libc.so.6 0x00007fb8ece287f3 abort + 211
7  libc.so.6 0x00007fb8ece2871b
8  libc.so.6 0x00007fb8ece39e96
9  llc       0x0000557d992220a6 llvm::ScheduleDAGMILive::updatePressureDiffs(llvm::ArrayRef<llvm::RegisterMaskPair>) + 2038
10 llc       0x0000557d9922e311 llvm::ScheduleDAGMILive::initRegPressure() + 465
11 llc       0x0000557d99233294 llvm::ScheduleDAGMILive::schedule() + 68
12 llc       0x0000557d9921bf3d
13 llc       0x0000557d9922d322
14 llc       0x0000557d991814d7
15 llc       0x0000557d9972ee3e llvm::FPPassManager::runOnFunction(llvm::Function&) + 878
16 llc       0x0000557d9972f089 llvm::FPPassManager::runOnModule(llvm::Module&) + 57
17 llc       0x0000557d9972f9c5 llvm::legacy::PassManagerImpl::run(llvm::Module&) + 1061
18 llc       0x0000557d970dea1e
19 llc       0x0000557d97028006 main + 1878
20 libc.so.6 0x00007fb8ece29d90
21 libc.so.6 0x00007fb8ece29e40 __libc_start_main + 128
22 llc       0x0000557d970d5605 _start + 37
Aborted (core dumped)

$ cat hand-reduced.ll 
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux-gnu"

define void @test(i1 %exitcond6351.not) #0 {
entry:
  br label %for.body2902

for.body2987.preheader:                           ; preds = %for.body2902
  %0 = shufflevector <2 x double> %3, <2 x double> zeroinitializer, <8 x i32> <i32 0, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 poison>
  %1 = insertelement <8 x double> %0, double 0.000000e+00, i64 0
  store <8 x double> %0, ptr null, align 8
  br label %delete.end

for.body2902:                                     ; preds = %for.body2902, %entry
  %2 = phi <2 x double> [ %3, %for.body2902 ], [ zeroinitializer, %entry ]
  %3 = fadd <2 x double> zeroinitializer, %2
  br i1 %exitcond6351.not, label %for.body2987.preheader, label %for.body2902

delete.end:                                       ; preds = %for.body2987.preheader
  ret void
}

attributes #0 = { "target-features"="+64bit,+a,+c,+d,+f,+m,+v,,+zvl128b,+zvl256b" }

[llvmbot]

@llvm/issue-subscribers-backend-risc-v

Author: Philip Reames (preames)

Reduce test case for a crash observed in an LTO build of spec2017 namd. This is a newish failure, but not new. I waited a bit before bothering to reduce this under the hopes that the triggering change would be reverted.

@fpetrogalli I'm guessing this is related to your large rewrite, but haven't yet confirmed that.

$ llc < hand-reduced.ll 
	.text
	.attribute	4, 16
	.attribute	5, "rv64i2p1"
	.file	"<stdin>"
llc: ../llvm-project/llvm/lib/CodeGen/MachineScheduler.cpp:1368: void llvm::ScheduleDAGMILive::updatePressureDiffs(llvm::ArrayRef<llvm::RegisterMaskPair>): Assertion `VNI && "No live value at use."' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: /home/preames/llvm-dev/llvm-project/llvm/llc
1.	Running pass 'Function Pass Manager' on module '<stdin>'.
2.	Running pass 'Machine Instruction Scheduler' on function '@<!-- -->test'
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0  llc       0x0000557d99f08b70 llvm::sys::PrintStackTrace(llvm::raw_ostream&amp;, int) + 240
1  llc       0x0000557d99f05f7f llvm::sys::RunSignalHandlers() + 47
2  llc       0x0000557d99f060d5
3  libc.so.6 0x00007fb8ece42520
4  libc.so.6 0x00007fb8ece969fc pthread_kill + 300
5  libc.so.6 0x00007fb8ece42476 raise + 22
6  libc.so.6 0x00007fb8ece287f3 abort + 211
7  libc.so.6 0x00007fb8ece2871b
8  libc.so.6 0x00007fb8ece39e96
9  llc       0x0000557d992220a6 llvm::ScheduleDAGMILive::updatePressureDiffs(llvm::ArrayRef&lt;llvm::RegisterMaskPair&gt;) + 2038
10 llc       0x0000557d9922e311 llvm::ScheduleDAGMILive::initRegPressure() + 465
11 llc       0x0000557d99233294 llvm::ScheduleDAGMILive::schedule() + 68
12 llc       0x0000557d9921bf3d
13 llc       0x0000557d9922d322
14 llc       0x0000557d991814d7
15 llc       0x0000557d9972ee3e llvm::FPPassManager::runOnFunction(llvm::Function&amp;) + 878
16 llc       0x0000557d9972f089 llvm::FPPassManager::runOnModule(llvm::Module&amp;) + 57
17 llc       0x0000557d9972f9c5 llvm::legacy::PassManagerImpl::run(llvm::Module&amp;) + 1061
18 llc       0x0000557d970dea1e
19 llc       0x0000557d97028006 main + 1878
20 libc.so.6 0x00007fb8ece29d90
21 libc.so.6 0x00007fb8ece29e40 __libc_start_main + 128
22 llc       0x0000557d970d5605 _start + 37
Aborted (core dumped)

$ cat hand-reduced.ll 
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux-gnu"

define void @<!-- -->test(i1 %exitcond6351.not) #<!-- -->0 {
entry:
  br label %for.body2902

for.body2987.preheader:                           ; preds = %for.body2902
  %0 = shufflevector &lt;2 x double&gt; %3, &lt;2 x double&gt; zeroinitializer, &lt;8 x i32&gt; &lt;i32 0, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 poison&gt;
  %1 = insertelement &lt;8 x double&gt; %0, double 0.000000e+00, i64 0
  store &lt;8 x double&gt; %0, ptr null, align 8
  br label %delete.end

for.body2902:                                     ; preds = %for.body2902, %entry
  %2 = phi &lt;2 x double&gt; [ %3, %for.body2902 ], [ zeroinitializer, %entry ]
  %3 = fadd &lt;2 x double&gt; zeroinitializer, %2
  br i1 %exitcond6351.not, label %for.body2987.preheader, label %for.body2902

delete.end:                                       ; preds = %for.body2987.preheader
  ret void
}

attributes #<!-- -->0 = { "target-features"="+64bit,+a,+c,+d,+f,+m,+v,,+zvl128b,+zvl256b" }

[preames]

Note that this problem does not appear to be in 17.x. The following commit does not crash:
commit b2417f5 (HEAD -> release/17.x, tag: llvmorg-17.0.2, upstream/release/17.x)

[preames]

git bisect led to the following result:

b5ff71e261b637ab7088fb5c3314bf71d6e01da7 is the first bad commit
commit b5ff71e261b637ab7088fb5c3314bf71d6e01da7
Author: Luke Lau <luke@igalia.com>
Date:   Thu Sep 21 13:55:49 2023 +0100

    [RISCV] Shrink vslideup's LMUL when lowering fixed insert_subvector  (#65997)
    
    Similar to #65598, if we're using a vslideup to insert a fixed length
    vector into another vector, then we can work out the minimum number of
    registers it will need to slide up across given the minimum VLEN, and
    shrink the type operated on to reduce LMUL accordingly.
    
    This is somewhat dependent on #66211 , since it introduces a subregister
    copy that triggers a crash with -early-live-intervals in one of the
    tests.
    
    Stacked upon #66211

 llvm/lib/Target/RISCV/RISCVISelLowering.cpp        |  18 ++
 .../RISCV/rvv/fixed-vectors-insert-subvector.ll    |  45 ++-
 .../rvv/fixed-vectors-strided-load-combine.ll      |  80 ++---
 llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll    | 330 ++++++++++-----------
 4 files changed, 229 insertions(+), 244 deletions(-)

@luke957 FYI.

This was a surprise to me. I don't see anything immediately obvious in this change, but am going to take a closer look. This may simple be exposing another issue.

[preames]

I reverted 3a6cc52 to get the tree back into a green state through the dev conference. Note that I don't actually believe there's anything wrong with that change at the moment. I think it's just exposing an underlying issue.

[preames]

@jayfoad You had the last fix for a liveness issue exposed by this patch (#66211). Any chance you see what might be going wrong here?

[jayfoad]

@jayfoad You had the last fix for a liveness issue exposed by this patch (#66211). Any chance you see what might be going wrong here?

No not really. I notice that at the point of failure LIS->verifyAnalysis() and MF.verify(LIS, LIS->getSlotIndexes(), nullptr, true) don't report any problems, so I guess the problem may be in ScheduleDAGMILive itself.

[fpetrogalli]

One extra data point for the investigation: removing the following line from the reduced test case prevents the crash:

%1 = insertelement <8 x double> %0, double 0.000000e+00, i64 0

You need of course to rename %2 and %3 to something else, for example %x and %y