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alexrp opened this issue Dec 5, 2024 · 20 comments · Fixed by #135409
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backend:Hexagon crash Prefer [crash-on-valid] or [crash-on-invalid] release:backport

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@alexrp
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alexrp commented Dec 5, 2024

target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown-linux4.19.0-unknown"

define fastcc i16 @testing.expectEqualInner__anon_28689(ptr %0, <3 x i1> %1) {
Entry:
  ret i16 0
}
llc --version | head -n2
LLVM (http://llvm.org/):
  LLVM version 19.1.5llc reduced2.ll -mtriple hexagon-linux -O0
LLVM ERROR: unable to allocate function argument #1
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: llc reduced2.ll -mtriple hexagon-linux -O0
1.      Running pass 'Function Pass Manager' on module 'reduced2.ll'.
2.      Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on function '@testing.expectEqualInner__anon_28689'
 #0 0x00007ce4dca4fc22 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:727:3
 #1 0x00007ce4dca4d58f llvm::sys::RunSignalHandlers() /home/alexrp/Source/llvm-project/llvm/lib/Support/Signals.cpp:105:20
 #2 0x00007ce4dca4d926 SignalHandler(int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:413:1
 #3 0x00007ce4db442990 (/lib/x86_64-linux-gnu/libc.so.6+0x42990)
 #4 0x00007ce4db499a1b __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #5 0x00007ce4db499a1b __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #6 0x00007ce4db499a1b pthread_kill ./nptl/pthread_kill.c:89:10
 #7 0x00007ce4db4428e6 gsignal ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x00007ce4db4268b7 abort ./stdlib/abort.c:81:7
 #9 0x00007ce4dc780c78 std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>::_M_replace(unsigned long, unsigned long, char const*, unsigned long) /usr/include/c++/13/bits/basic_string.tcc:540:21
#10 0x00007ce4dc780c78 std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>::assign(char const*) (.isra.0.cold) /usr/include/c++/13/bits/basic_string.h:1672:19
#11 0x00007ce4dcd88e55 llvm::CCState::AnalyzeFormalArguments(llvm::SmallVectorImpl<llvm::ISD::InputArg> const&, bool (*)(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp:95:1
#12 0x00007ce4e020bd6e llvm::HexagonTargetLowering::LowerFormalArguments(llvm::SDValue, unsigned int, bool, llvm::SmallVectorImpl<llvm::ISD::InputArg> const&, llvm::SDLoc const&, llvm::SelectionDAG&, llvm::SmallVectorImpl<llvm::SDValue>&) const /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp:814:34
#13 0x00007ce4dd576ede llvm::SelectionDAGISel::LowerArguments(llvm::Function const&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:11620:46
#14 0x00007ce4dd636708 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1625:19
#15 0x00007ce4dd6375dc llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:632:22
#16 0x00007ce4e01dd5e4 llvm::HexagonDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h:47:17
#17 0x00007ce4dd622b57 llvm::OptLevelChanger::~OptLevelChanger() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:268:11
#18 0x00007ce4dd622b57 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:375:1
#19 0x00007ce4dd622b57 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:346:6
#20 0x00007ce4dcf96fdf llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:94:33
#21 0x00007ce4dcc0d807 llvm::FPPassManager::runOnFunction(llvm::Function&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1450:7
#22 0x00007ce4dcc0da41 llvm::ilist_detail::node_base_prevnext<llvm::ilist_node_base<true, void>, true>::getNext() const /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node_base.h:42:38
#23 0x00007ce4dcc0da41 llvm::ilist_node_impl<llvm::ilist_detail::node_options<llvm::Function, true, false, void, false, void>>::getNext() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node.h:117:66
#24 0x00007ce4dcc0da41 llvm::ilist_iterator<llvm::ilist_detail::node_options<llvm::Function, true, false, void, false, void>, false, false>::operator++() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:187:25
#25 0x00007ce4dcc0da41 llvm::FPPassManager::runOnModule(llvm::Module&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1485:22
#26 0x00007ce4dcc0e2c4 runOnModule /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1562:7
#27 0x00007ce4dcc0e2c4 llvm::legacy::PassManagerImpl::run(llvm::Module&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:541:55
#28 0x00005d438bb8ba3c compileModule(char**, llvm::LLVMContext&) /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:742:34
#29 0x00005d438bb7ff77 main /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:409:35
#30 0x00007ce4db428150 __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#31 0x00007ce4db428209 call_init ./csu/../csu/libc-start.c:128:20
#32 0x00007ce4db428209 __libc_start_main ./csu/../csu/libc-start.c:347:5
#33 0x00005d438bb80cf5 _start (/opt/llvm-19/bin/llc+0x13cf5)
@alexrp
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alexrp commented Dec 5, 2024

FYI @androm3da

@alexrp alexrp changed the title [llvm][Hexagon] unable to allocate function argument in llvm::HexagonTargetLowering::LowerFormalArguments() [llvm][Hexagon] unable to allocate function argument crash in llvm::HexagonTargetLowering::LowerFormalArguments() Dec 5, 2024
@EugeneZelenko EugeneZelenko added backend:Hexagon crash Prefer [crash-on-valid] or [crash-on-invalid] llvm:SelectionDAG SelectionDAGISel as well and removed new issue labels Dec 5, 2024
@llvmbot
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llvmbot commented Dec 5, 2024

@llvm/issue-subscribers-backend-hexagon

Author: Alex Rønne Petersen (alexrp)

```llvm target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048" target triple = "hexagon-unknown-linux4.19.0-unknown"

define fastcc i16 @testing.expectEqualInner__anon_28689(ptr %0, <3 x i1> %1) {
Entry:
ret i16 0
}


```console
❯ llc --version | head -n2
LLVM (http://llvm.org/):
  LLVM version 19.1.5
❯ llc reduced2.ll -mtriple hexagon-linux -O0
LLVM ERROR: unable to allocate function argument #<!-- -->1
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: llc reduced2.ll -mtriple hexagon-linux -O0
1.      Running pass 'Function Pass Manager' on module 'reduced2.ll'.
2.      Running pass 'Hexagon DAG-&gt;DAG Pattern Instruction Selection' on function '@<!-- -->testing.expectEqualInner__anon_28689'
 #<!-- -->0 0x00007ce4dca4fc22 llvm::sys::PrintStackTrace(llvm::raw_ostream&amp;, int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:727:3
 #<!-- -->1 0x00007ce4dca4d58f llvm::sys::RunSignalHandlers() /home/alexrp/Source/llvm-project/llvm/lib/Support/Signals.cpp:105:20
 #<!-- -->2 0x00007ce4dca4d926 SignalHandler(int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:413:1
 #<!-- -->3 0x00007ce4db442990 (/lib/x86_64-linux-gnu/libc.so.6+0x42990)
 #<!-- -->4 0x00007ce4db499a1b __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #<!-- -->5 0x00007ce4db499a1b __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #<!-- -->6 0x00007ce4db499a1b pthread_kill ./nptl/pthread_kill.c:89:10
 #<!-- -->7 0x00007ce4db4428e6 gsignal ./signal/../sysdeps/posix/raise.c:27:6
 #<!-- -->8 0x00007ce4db4268b7 abort ./stdlib/abort.c:81:7
 #<!-- -->9 0x00007ce4dc780c78 std::__cxx11::basic_string&lt;char, std::char_traits&lt;char&gt;, std::allocator&lt;char&gt;&gt;::_M_replace(unsigned long, unsigned long, char const*, unsigned long) /usr/include/c++/13/bits/basic_string.tcc:540:21
#<!-- -->10 0x00007ce4dc780c78 std::__cxx11::basic_string&lt;char, std::char_traits&lt;char&gt;, std::allocator&lt;char&gt;&gt;::assign(char const*) (.isra.0.cold) /usr/include/c++/13/bits/basic_string.h:1672:19
#<!-- -->11 0x00007ce4dcd88e55 llvm::CCState::AnalyzeFormalArguments(llvm::SmallVectorImpl&lt;llvm::ISD::InputArg&gt; const&amp;, bool (*)(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&amp;)) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp:95:1
#<!-- -->12 0x00007ce4e020bd6e llvm::HexagonTargetLowering::LowerFormalArguments(llvm::SDValue, unsigned int, bool, llvm::SmallVectorImpl&lt;llvm::ISD::InputArg&gt; const&amp;, llvm::SDLoc const&amp;, llvm::SelectionDAG&amp;, llvm::SmallVectorImpl&lt;llvm::SDValue&gt;&amp;) const /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp:814:34
#<!-- -->13 0x00007ce4dd576ede llvm::SelectionDAGISel::LowerArguments(llvm::Function const&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:11620:46
#<!-- -->14 0x00007ce4dd636708 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1625:19
#<!-- -->15 0x00007ce4dd6375dc llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:632:22
#<!-- -->16 0x00007ce4e01dd5e4 llvm::HexagonDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h:47:17
#<!-- -->17 0x00007ce4dd622b57 llvm::OptLevelChanger::~OptLevelChanger() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:268:11
#<!-- -->18 0x00007ce4dd622b57 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:375:1
#<!-- -->19 0x00007ce4dd622b57 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&amp;) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:346:6
#<!-- -->20 0x00007ce4dcf96fdf llvm::MachineFunctionPass::runOnFunction(llvm::Function&amp;) (.part.0) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:94:33
#<!-- -->21 0x00007ce4dcc0d807 llvm::FPPassManager::runOnFunction(llvm::Function&amp;) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1450:7
#<!-- -->22 0x00007ce4dcc0da41 llvm::ilist_detail::node_base_prevnext&lt;llvm::ilist_node_base&lt;true, void&gt;, true&gt;::getNext() const /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node_base.h:42:38
#<!-- -->23 0x00007ce4dcc0da41 llvm::ilist_node_impl&lt;llvm::ilist_detail::node_options&lt;llvm::Function, true, false, void, false, void&gt;&gt;::getNext() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node.h:117:66
#<!-- -->24 0x00007ce4dcc0da41 llvm::ilist_iterator&lt;llvm::ilist_detail::node_options&lt;llvm::Function, true, false, void, false, void&gt;, false, false&gt;::operator++() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:187:25
#<!-- -->25 0x00007ce4dcc0da41 llvm::FPPassManager::runOnModule(llvm::Module&amp;) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1485:22
#<!-- -->26 0x00007ce4dcc0e2c4 runOnModule /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1562:7
#<!-- -->27 0x00007ce4dcc0e2c4 llvm::legacy::PassManagerImpl::run(llvm::Module&amp;) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:541:55
#<!-- -->28 0x00005d438bb8ba3c compileModule(char**, llvm::LLVMContext&amp;) /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:742:34
#<!-- -->29 0x00005d438bb7ff77 main /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:409:35
#<!-- -->30 0x00007ce4db428150 __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#<!-- -->31 0x00007ce4db428209 call_init ./csu/../csu/libc-start.c:128:20
#<!-- -->32 0x00007ce4db428209 __libc_start_main ./csu/../csu/libc-start.c:347:5
#<!-- -->33 0x00005d438bb80cf5 _start (/opt/llvm-19/bin/llc+0x13cf5)

@androm3da
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<3 x i1> %1 - I wonder if this could be stumbling over a similar issue described in #59009 (though the specific symptom might be different).

Just i1 %1 seems to no longer fail with unable to allocate function argument (though at -O2 it fails with a different message in DomTreeBuilder::SemiNCAInfo<<...>>::verifyReachability()).

iajbar pushed a commit that referenced this issue Feb 25, 2025
This commit updates the Hexagon backend to handle
vxi1 call operands. It ensures compatibility for
vector types of sizes 4, 8, 16, 32, 64, and 128 x i1 when HVX is
enabled.

~Fixes #59009 and #118879~
@androm3da androm3da added this to the LLVM 20.X Release milestone Feb 28, 2025
@github-project-automation github-project-automation bot moved this to Needs Triage in LLVM Release Status Feb 28, 2025
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/cherry-pick 8e11725

I'll reopen this issue since the commit above only mitigates the problem from this issue in some modes, and I think this issue would get auto-closed by the automation when spawning the cherry-pick PR.

@EugeneZelenko EugeneZelenko added release:backport and removed llvm:SelectionDAG SelectionDAGISel as well labels Feb 28, 2025
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llvmbot commented Feb 28, 2025

Failed to cherry-pick: 8e11725

https://github.com/llvm/llvm-project/actions/runs/13596437941

Please manually backport the fix and push it to your github fork. Once this is done, please create a pull request

@androm3da
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Whoops, sha was from the wrong repo.

/cherry-pick 37559c8

@llvmbot
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llvmbot commented Feb 28, 2025

/pull-request #129311

@tstellar tstellar moved this from Needs Triage to Done in LLVM Release Status Mar 11, 2025
swift-ci pushed a commit to swiftlang/llvm-project that referenced this issue Mar 11, 2025
This commit updates the Hexagon backend to handle
vxi1 call operands. It ensures compatibility for
vector types of sizes 4, 8, 16, 32, 64, and 128 x i1 when HVX is
enabled.

~Fixes llvm#59009 and llvm#118879~

(cherry picked from commit 37559c8)
@androm3da
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@alexrp this particular reproducer seems to run w/o an LLVM ERROR. Can we close this issue or is there something still outstanding?

@alexrp
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alexrp commented Mar 20, 2025

Does it work without HVX enabled?

@androm3da
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androm3da commented Mar 20, 2025

Does it work without HVX enabled?

I'm not sure what kind of codegen to expect in any case. But it doesn't LLVM ERROR anymore (with or without HVX).

As of ead2724:

$ cat llvm_zig_iss_118879.ll
target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown-linux4.19.0-unknown"

define fastcc i16 @testing.expectEqualInner__anon_28689(ptr %0, <3 x i1> %1) {
Entry:
          ret i16 0
}

$ ./obj_llvm/bin/llc -mhvx -mtriple hexagon-linux -O0 < llvm_zig_iss_118879.ll  > /dev/null ; echo $?
0
$ ./obj_llvm/bin/llc  -mtriple hexagon-linux -O0 < llvm_zig_iss_118879.ll  > /dev/null ; echo $?
0

@alexrp
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alexrp commented Mar 20, 2025

Nice; then yeah, I would consider this solved.

@alexrp alexrp closed this as completed Mar 20, 2025
@alexrp
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alexrp commented Apr 7, 2025

@androm3da unfortunately, we've hit another case in the Zig behavior tests:

target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
target triple = "hexagon-unknown-linux4.19.0-unknown"

define fastcc i16 @testing.expectEqualInner__anon_86824(ptr %0, <2 x i1> %1) {
Entry:
  ret i16 0
}
llc --version | head -n2
LLVM (http://llvm.org/):
  LLVM version 20.1.2llc reduced.ll
LLVM ERROR: unable to allocate function argument #1
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: llc reduced.ll
1.      Running pass 'Function Pass Manager' on module 'reduced.ll'.
2.      Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on function '@testing.expectEqualInner__anon_86824'
 #0 0x000074cd87780e02 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:803:3
 #1 0x000074cd8777e7af llvm::sys::RunSignalHandlers() /home/alexrp/Source/llvm-project/llvm/lib/Support/Signals.cpp:105:20
 #2 0x000074cd8777eb3d SignalHandler(int) /home/alexrp/Source/llvm-project/llvm/lib/Support/Unix/Signals.inc:415:1
 #3 0x000074cd86045330 (/lib/x86_64-linux-gnu/libc.so.6+0x45330)
 #4 0x000074cd8609eb2c __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #5 0x000074cd8609eb2c __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #6 0x000074cd8609eb2c pthread_kill ./nptl/pthread_kill.c:89:10
 #7 0x000074cd8604527e raise ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x000074cd860288ff abort ./stdlib/abort.c:81:7
 #9 0x000074cd87493cf9 (/opt/llvm-20/bin/../lib/libLLVM.so.20.1+0xc93cf9)
#10 0x000074cd87ad9ac5 llvm::CCState::AnalyzeFormalArguments(llvm::SmallVectorImpl<llvm::ISD::InputArg> const&, bool (*)(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp:95:1
#11 0x000074cd8b1f9b91 llvm::HexagonTargetLowering::LowerFormalArguments(llvm::SDValue, unsigned int, bool, llvm::SmallVectorImpl<llvm::ISD::InputArg> const&, llvm::SDLoc const&, llvm::SelectionDAG&, llvm::SmallVectorImpl<llvm::SDValue>&) const /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp:810:34
#12 0x000074cd882fe999 llvm::SelectionDAGISel::LowerArguments(llvm::Function const&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:11768:46
#13 0x000074cd883c1034 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1651:19
#14 0x000074cd883c1c19 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:616:22
#15 0x000074cd8b1cab34 llvm::HexagonDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h:47:17
#16 0x000074cd883b2547 llvm::OptLevelChanger::~OptLevelChanger() /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:269:11
#17 0x000074cd883b2547 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:376:1
#18 0x000074cd883b2547 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:347:6
#19 0x000074cd87cfa58f llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) /home/alexrp/Source/llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:94:33
#20 0x000074cd879453a4 llvm::FPPassManager::runOnFunction(llvm::Function&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1416:7
#21 0x000074cd879455c1 llvm::ilist_detail::node_base_prevnext<llvm::ilist_node_base<true, void>, true>::getNext() const /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node_base.h:42:38
#22 0x000074cd879455c1 llvm::ilist_node_impl<llvm::ilist_detail::node_options<llvm::Function, true, false, void, false, void>>::getNext() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_node.h:117:66
#23 0x000074cd879455c1 llvm::ilist_iterator<llvm::ilist_detail::node_options<llvm::Function, true, false, void, false, void>, false, false>::operator++() /home/alexrp/Source/llvm-project/llvm/include/llvm/ADT/ilist_iterator.h:187:25
#24 0x000074cd879455c1 llvm::FPPassManager::runOnModule(llvm::Module&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1451:22
#25 0x000074cd87945e0d runOnModule /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1528:7
#26 0x000074cd87945e0d llvm::legacy::PassManagerImpl::run(llvm::Module&) /home/alexrp/Source/llvm-project/llvm/lib/IR/LegacyPassManager.cpp:539:55
#27 0x000063a94c3fb9df compileModule(char**, llvm::LLVMContext&) /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:753:34
#28 0x000063a94c3f0057 main /home/alexrp/Source/llvm-project/llvm/tools/llc/llc.cpp:411:35
#29 0x000074cd8602a1ca __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#30 0x000074cd8602a28b call_init ./csu/../csu/libc-start.c:128:20
#31 0x000074cd8602a28b __libc_start_main ./csu/../csu/libc-start.c:347:5
#32 0x000063a94c3f0de5 _start (/opt/llvm-20/bin/llc+0x12de5)

@alexrp alexrp reopened this Apr 7, 2025
@github-project-automation github-project-automation bot moved this from Done to Needs Triage in LLVM Release Status Apr 7, 2025
@androm3da
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unfortunately, we've hit another case in the Zig behavior tests:

Okay, that was my misunderstanding of what @pkarveti did in #128027 . I shouldn't have suggested closure.

It ensures compatibility for vector types of sizes 4, 8, 16, 32, 64, and 128 x i1 when HVX is enabled.

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alexrp commented Apr 7, 2025

Aside: How common is HVX support in Hexagon hardware? Is it a situation that resembles x86 where SSE is basically considered baseline?

alexrp added a commit to alexrp/zig that referenced this issue Apr 7, 2025
Most of the failures are:

* llvm/llvm-project#118879
* llvm/llvm-project#134659

But some are also miscompilations leading to wrong results. I'm not going to
investigate the latter further until all the backend crashes have been resolved.
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Aside: How common is HVX support in Hexagon hardware? Is it a situation that resembles x86 where SSE is basically considered baseline?

I think it's universal for compute DSPs. But it's definitely not like x86 in that regard: they still make modern Hexagon DSPs without HVX coprocs. In a typical SoC, out of 2-3 hexagon DSPs there'd probably be ~1 without HVX.

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iajbar commented Apr 7, 2025

We are currently working on fix for this case when HVX is disabled.

alexrp added a commit to alexrp/zig that referenced this issue Apr 11, 2025
Most of the failures are:

* llvm/llvm-project#118879
* llvm/llvm-project#134659

But some are also miscompilations leading to wrong results. I'm not going to
investigate the latter further until all the backend crashes have been resolved.
@iajbar iajbar closed this as completed in 32c3909 Apr 11, 2025
@github-project-automation github-project-automation bot moved this from Needs Triage to Done in LLVM Release Status Apr 11, 2025
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@iajbar for the sake of LLVM IR conformance, do we need support to lower arbitrary v<n>i<m> types? Or are the types supported only for some specific powers-of-two?

Related question -- can we use a tool like ./bin/llvm-stress --enable-scalable-vectors | ./bin/llc --mtriple=hexagon to verify that the compiler robustly supports all of the IR that a frontend could generate?

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/cherry-pick 32c3909

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llvmbot commented Apr 12, 2025

/pull-request #135461

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iajbar commented Apr 14, 2025

Thanks Brian. I am working on fixing other cases uncovered by llvm-stress.

swift-ci pushed a commit to swiftlang/llvm-project that referenced this issue Apr 16, 2025
var-const pushed a commit to ldionne/llvm-project that referenced this issue Apr 17, 2025
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