Skip to content

Commit 9e4210f

Browse files
authored
[RISCV] Use iXLen for ptr<->int casts in vararg.ll (#74426)
Also use ABI alignment for ptr sized objects. This makes the code more sane and avoids only loading part of what was stored by vastart on RV64.
1 parent 164c204 commit 9e4210f

File tree

1 file changed

+24
-39
lines changed

1 file changed

+24
-39
lines changed

llvm/test/CodeGen/RISCV/vararg.ll

Lines changed: 24 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,25 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
2+
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -verify-machineinstrs \
33
; RUN: | FileCheck -check-prefix=ILP32-ILP32F-FPELIM %s
4-
; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \
4+
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all \
55
; RUN: | FileCheck -check-prefix=ILP32-ILP32F-WITHFP %s
6-
; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
6+
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs \
77
; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
8-
; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \
9-
; RUN: -verify-machineinstrs < %s \
8+
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \
9+
; RUN: -verify-machineinstrs \
1010
; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
11-
; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
12-
; RUN: -verify-machineinstrs < %s \
11+
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
12+
; RUN: -verify-machineinstrs \
1313
; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
14-
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
14+
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -verify-machineinstrs \
1515
; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
16-
; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \
17-
; RUN: -verify-machineinstrs < %s \
16+
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \
17+
; RUN: -verify-machineinstrs \
1818
; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
19-
; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \
20-
; RUN: -verify-machineinstrs < %s \
19+
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \
20+
; RUN: -verify-machineinstrs \
2121
; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
22-
; RUN: llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all < %s \
22+
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all \
2323
; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-WITHFP %s
2424

2525
; The same vararg calling convention is used for ilp32/ilp32f/ilp32d and for
@@ -556,24 +556,16 @@ define i64 @va2(ptr %fmt, ...) nounwind {
556556
; LP64-LP64F-LP64D-FPELIM-LABEL: va2:
557557
; LP64-LP64F-LP64D-FPELIM: # %bb.0:
558558
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
559+
; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
559560
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
560561
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
561562
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
562563
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
563564
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
564565
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
565566
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
566-
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24
567-
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
568-
; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
569-
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 7
570-
; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 32
571-
; LP64-LP64F-LP64D-FPELIM-NEXT: srli a1, a1, 32
572-
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8
567+
; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 39
573568
; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
574-
; LP64-LP64F-LP64D-FPELIM-NEXT: srliw a0, a0, 3
575-
; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 3
576-
; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
577569
; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
578570
; LP64-LP64F-LP64D-FPELIM-NEXT: ret
579571
;
@@ -583,37 +575,30 @@ define i64 @va2(ptr %fmt, ...) nounwind {
583575
; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
584576
; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
585577
; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
578+
; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
586579
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
587580
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
588581
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
589582
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
590583
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
591584
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
592585
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
593-
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
594-
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
595-
; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
596-
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 7
597-
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 32
598-
; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32
599-
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
586+
; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 23
600587
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
601-
; LP64-LP64F-LP64D-WITHFP-NEXT: srliw a0, a0, 3
602-
; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 3
603-
; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
604588
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
605589
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
606590
; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
607591
; LP64-LP64F-LP64D-WITHFP-NEXT: ret
608592
%va = alloca ptr
609593
call void @llvm.va_start(ptr %va)
610-
%argp.cur = load i32, ptr %va, align 4
611-
%1 = add i32 %argp.cur, 7
612-
%2 = and i32 %1, -8
613-
%argp.cur.aligned = inttoptr i32 %1 to ptr
594+
%argp.cur = load ptr, ptr %va
595+
%ptrint = ptrtoint ptr %argp.cur to iXLen
596+
%1 = add iXLen %ptrint, 7
597+
%2 = and iXLen %1, -8
598+
%argp.cur.aligned = inttoptr iXLen %1 to ptr
614599
%argp.next = getelementptr inbounds i8, ptr %argp.cur.aligned, i32 8
615-
store ptr %argp.next, ptr %va, align 4
616-
%3 = inttoptr i32 %2 to ptr
600+
store ptr %argp.next, ptr %va
601+
%3 = inttoptr iXLen %2 to ptr
617602
%4 = load double, ptr %3, align 8
618603
%5 = bitcast double %4 to i64
619604
call void @llvm.va_end(ptr %va)

0 commit comments

Comments
 (0)