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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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- ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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+ ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=ILP32-ILP32F-FPELIM %s
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- ; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \
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+ ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all \
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; RUN: | FileCheck -check-prefix=ILP32-ILP32F-WITHFP %s
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- ; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
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+ ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
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- ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \
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- ; RUN: -verify-machineinstrs < %s \
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+ ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \
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+ ; RUN: -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
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- ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
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- ; RUN: -verify-machineinstrs < %s \
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+ ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
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+ ; RUN: -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
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- ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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+ ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
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- ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \
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- ; RUN: -verify-machineinstrs < %s \
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+ ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \
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+ ; RUN: -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
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- ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \
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- ; RUN: -verify-machineinstrs < %s \
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+ ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \
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+ ; RUN: -verify-machineinstrs \
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; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
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- ; RUN: llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all < %s \
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+ ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all \
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; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-WITHFP %s
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; The same vararg calling convention is used for ilp32/ilp32f/ilp32d and for
@@ -556,24 +556,16 @@ define i64 @va2(ptr %fmt, ...) nounwind {
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; LP64-LP64F-LP64D-FPELIM-LABEL: va2:
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; LP64-LP64F-LP64D-FPELIM: # %bb.0:
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; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
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+ ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 7
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 32
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a1, a1, 32
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8
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+ ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 39
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; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: srliw a0, a0, 3
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 3
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- ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
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; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
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; LP64-LP64F-LP64D-FPELIM-NEXT: ret
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;
@@ -583,37 +575,30 @@ define i64 @va2(ptr %fmt, ...) nounwind {
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
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+ ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 7
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 32
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
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+ ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 23
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; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: srliw a0, a0, 3
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 3
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- ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
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; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
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; LP64-LP64F-LP64D-WITHFP-NEXT: ret
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%va = alloca ptr
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call void @llvm.va_start (ptr %va )
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- %argp.cur = load i32 , ptr %va , align 4
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- %1 = add i32 %argp.cur , 7
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- %2 = and i32 %1 , -8
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- %argp.cur.aligned = inttoptr i32 %1 to ptr
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+ %argp.cur = load ptr , ptr %va
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+ %ptrint = ptrtoint ptr %argp.cur to iXLen
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+ %1 = add iXLen %ptrint , 7
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+ %2 = and iXLen %1 , -8
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+ %argp.cur.aligned = inttoptr iXLen %1 to ptr
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%argp.next = getelementptr inbounds i8 , ptr %argp.cur.aligned , i32 8
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- store ptr %argp.next , ptr %va , align 4
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- %3 = inttoptr i32 %2 to ptr
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+ store ptr %argp.next , ptr %va
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+ %3 = inttoptr iXLen %2 to ptr
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%4 = load double , ptr %3 , align 8
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%5 = bitcast double %4 to i64
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call void @llvm.va_end (ptr %va )
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