Merge branch 'llvm:main' into v4i8reg

Author: Artem-B

.github/CODEOWNERS

@@ -1,4 +1,32 @@
+# This file lists reviewers that are auto-assigned when a pull request modifies
+# certain files or directories. If you add yourself to this file, you commit to
+# reviewing a large fraction of pull requests in the relevant area.
+#
+# The GitHub "code owners" mechanism is used exclusively to auto-assign
+# reviewers and does not carry significance beyond that. It is not necessary
+# to receive an approval from a "code owner" in particular -- any LLVM project
+# member can approve pull requests.
+#
+# Note that GitHub's concept of "code owner" is independent from LLVM's own
+# "code owner" concept, they merely happen to share terminology. See
+# https://llvm.org/docs/DeveloperPolicy.html#code-owners, as well as the
+# CODE_OWNERS.txt files in the respective subproject directories.
+
 /libcxx/ @llvm/reviewers-libcxx
 /libcxxabi/ @llvm/reviewers-libcxxabi
 /libunwind/ @llvm/reviewers-libunwind
 /runtimes/ @llvm/reviewers-libcxx
+
+/llvm/lib/Analysis/BasicAliasAnalysis.cpp @nikic
+/llvm/lib/Analysis/InstructionSimplify.cpp @nikic
+/llvm/lib/Analysis/LazyValueInfo.cpp @nikic
+/llvm/lib/Analysis/ScalarEvolution.cpp @nikic
+/llvm/lib/Analysis/ValueTracking.cpp @nikic
+/llvm/lib/IR/ConstantRange.cpp @nikic
+/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp @nikic
+/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp @nikic
+/llvm/lib/Transforms/InstCombine/ @nikic
+
+/clang/test/CXX/drs/ @Endilll
+/clang/www/cxx_dr_status.html @Endilll
+/clang/www/make_cxx_dr_status @Endilll

.github/new-issues-labeler.yml

@@ -10,8 +10,8 @@
 'libc++':
   - '/libc[+x]{2}(?!\-)/i'
 
-'libc++-abi':
-  - '/libc[+x]{2}-abi/i'
+'libc++abi':
+  - '/libc[+x]{2}-?abi/i'
 
 'libc':
   - '/\blibc(?![-+])\b/i'

.github/new-prs-labeler.yml

@@ -309,10 +309,6 @@ tools:llvm-mca:
   - llvm/include/llvm/MCA/**
   - llvm/lib/MCA/**
 
-vectorizers:
-  - llvm/lib/Transforms/Vectorize/**
-  - llvm/include/llvm/Transforms/Vectorize/**
-
 clang:
   - any:
     - clang/**

.github/workflows/llvm-tests.yml

@@ -170,14 +170,17 @@ jobs:
         uses: actions/download-artifact@v3
         with:
           name: build-baseline
+          path: build-baseline
       - name: Download latest
         uses: actions/download-artifact@v3
         with:
           name: build-latest
+          path: build-latest
       - name: Download symbol list
         uses: actions/download-artifact@v3
         with:
           name: symbol-list
+          path: symbol-list
 
       - name: Install abi-compliance-checker
         run: sudo apt-get install abi-compliance-checker

.github/workflows/pr-code-format.yml

@@ -27,7 +27,7 @@ jobs:
       - name: Install clang-format
         uses: aminya/setup-cpp@v1
         with:
-          clangformat: 16.0.6
+          clangformat: 17.0.1
 
       - name: Setup Python env
         uses: actions/setup-python@v4

.github/workflows/release-binaries.yml

@@ -68,7 +68,7 @@ jobs:
       matrix:
         target:
           - triple: x86_64-linux-gnu-ubuntu-22.04
-            runs-on: ubuntu-22.04-8x32
+            runs-on: ubuntu-22.04-16x64
             debian-build-deps: >
               chrpath
               gcc-multilib

bolt/include/bolt/Core/BinaryContext.h

@@ -871,6 +871,15 @@ class BinaryContext {
     return nullptr;
   }
 
+  /// Retrieves a reference to ELF's _GLOBAL_OFFSET_TABLE_ symbol, which points
+  /// at GOT, or null if it is not present in the input binary symtab.
+  BinaryData *getGOTSymbol();
+
+  /// Checks if symbol name refers to ELF's _GLOBAL_OFFSET_TABLE_ symbol
+  bool isGOTSymbol(StringRef SymName) const {
+    return SymName == "_GLOBAL_OFFSET_TABLE_";
+  }
+
   /// Return true if \p SymbolName was generated internally and was not present
   /// in the input binary.
   bool isInternalSymbolName(const StringRef Name) {

bolt/include/bolt/Core/Relocation.h

@@ -84,6 +84,7 @@ struct Relocation {
 
   /// Special relocation type that allows the linker to modify the instruction.
   static bool isX86GOTPCRELX(uint64_t Type);
+  static bool isX86GOTPC64(uint64_t Type);
 
   /// Return true if relocation type is NONE
   static bool isNone(uint64_t Type);

bolt/lib/Core/BinaryContext.cpp

@@ -1026,6 +1026,31 @@ BinaryContext::getBinaryDataContainingAddressImpl(uint64_t Address) const {
   return nullptr;
 }
 
+BinaryData *BinaryContext::getGOTSymbol() {
+  // First tries to find a global symbol with that name
+  BinaryData *GOTSymBD = getBinaryDataByName("_GLOBAL_OFFSET_TABLE_");
+  if (GOTSymBD)
+    return GOTSymBD;
+
+  // This symbol might be hidden from run-time link, so fetch the local
+  // definition if available.
+  GOTSymBD = getBinaryDataByName("_GLOBAL_OFFSET_TABLE_/1");
+  if (!GOTSymBD)
+    return nullptr;
+
+  // If the local symbol is not unique, fail
+  unsigned Index = 2;
+  SmallString<30> Storage;
+  while (const BinaryData *BD =
+             getBinaryDataByName(Twine("_GLOBAL_OFFSET_TABLE_/")
+                                     .concat(Twine(Index++))
+                                     .toStringRef(Storage)))
+    if (BD->getAddress() != GOTSymBD->getAddress())
+      return nullptr;
+
+  return GOTSymBD;
+}
+
 bool BinaryContext::setBinaryDataSize(uint64_t Address, uint64_t Size) {
   auto NI = BinaryDataMap.find(Address);
   assert(NI != BinaryDataMap.end());

bolt/lib/Core/BinaryFunction.cpp

@@ -1761,7 +1761,8 @@ bool BinaryFunction::postProcessIndirectBranches(
   uint64_t LastJT = 0;
   uint16_t LastJTIndexReg = BC.MIB->getNoRegister();
   for (BinaryBasicBlock &BB : blocks()) {
-    for (MCInst &Instr : BB) {
+    for (BinaryBasicBlock::iterator II = BB.begin(); II != BB.end(); ++II) {
+      MCInst &Instr = *II;
       if (!BC.MIB->isIndirectBranch(Instr))
         continue;
 
@@ -1789,7 +1790,7 @@ bool BinaryFunction::postProcessIndirectBranches(
         const MCExpr *DispExpr;
         MCInst *PCRelBaseInstr;
         IndirectBranchType Type = BC.MIB->analyzeIndirectBranch(
-            Instr, BB.begin(), BB.end(), PtrSize, MemLocInstr, BaseRegNum,
+            Instr, BB.begin(), II, PtrSize, MemLocInstr, BaseRegNum,
             IndexRegNum, DispValue, DispExpr, PCRelBaseInstr);
         if (Type != IndirectBranchType::UNKNOWN || MemLocInstr != nullptr)
           continue;