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Artem-BArtem-B
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Use .lo/ls/hi/hs suffixes for unsigned setp instructions.
Removed unused code.
1 parent f915e5b commit ef3d5de

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5 files changed

+17
-32
lines changed

5 files changed

+17
-32
lines changed

‎llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -3570,24 +3570,6 @@ bool NVPTXDAGToDAGISel::SelectADDRri64(SDNode *OpNode, SDValue Addr,
35703570
return SelectADDRri_imp(OpNode, Addr, Base, Offset, MVT::i64);
35713571
}
35723572

3573-
bool NVPTXDAGToDAGISel::SelectExtractEltFromV4I8(SDValue N, SDValue &V,
3574-
SDValue &BitOffset) {
3575-
SDValue Vector = N->getOperand(0);
3576-
if (!(N->getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
3577-
Vector->getValueType(0) == MVT::v4i8))
3578-
return false;
3579-
3580-
SDLoc DL(N);
3581-
V = Vector;
3582-
SDValue Index = N->getOperand(1);
3583-
if (const ConstantSDNode *IdxConst = dyn_cast<ConstantSDNode>(Index)) {
3584-
BitOffset =
3585-
CurDAG->getTargetConstant(IdxConst->getZExtValue() * 8, DL, MVT::i32);
3586-
return true;
3587-
}
3588-
return false;
3589-
}
3590-
35913573
bool NVPTXDAGToDAGISel::ChkMemSDNodeAddressSpace(SDNode *N,
35923574
unsigned int spN) const {
35933575
const Value *Src = nullptr;

‎llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,6 @@ class LLVM_LIBRARY_VISIBILITY NVPTXDAGToDAGISel : public SelectionDAGISel {
9595
SDValue &Offset);
9696
bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base,
9797
SDValue &Offset);
98-
bool SelectExtractEltFromV4I8(SDValue N, SDValue &Value, SDValue &Idx);
9998

10099
bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const;
101100

‎llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2259,7 +2259,7 @@ SDValue NVPTXTargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
22592259
DAG.getZExtOrTrunc(Index, DL, MVT::i32),
22602260
DAG.getConstant(8, DL, MVT::i32)),
22612261
DAG.getConstant(8, DL, MVT::i32)});
2262-
return DAG.getZExtOrTrunc(BFE, DL, Op->getValueType(0));
2262+
return DAG.getAnyExtOrTrunc(BFE, DL, Op->getValueType(0));
22632263
}
22642264

22652265
// Constant index will be matched by tablegen.

‎llvm/lib/Target/NVPTX/NVPTXInstrInfo.td

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,10 @@ def CmpLT : PatLeaf<(i32 2)>;
7676
def CmpLE : PatLeaf<(i32 3)>;
7777
def CmpGT : PatLeaf<(i32 4)>;
7878
def CmpGE : PatLeaf<(i32 5)>;
79+
def CmpLO : PatLeaf<(i32 6)>;
80+
def CmpLS : PatLeaf<(i32 7)>;
81+
def CmpHI : PatLeaf<(i32 8)>;
82+
def CmpHS : PatLeaf<(i32 9)>;
7983
def CmpEQU : PatLeaf<(i32 10)>;
8084
def CmpNEU : PatLeaf<(i32 11)>;
8185
def CmpLTU : PatLeaf<(i32 12)>;
@@ -2221,13 +2225,13 @@ def: Pat<(setle (sext_inreg (trunc Int32Regs:$a), i8), (sext_inreg (trunc Int32R
22212225
(SETP_s32rr Int32Regs:$a, Int32Regs:$b, CmpLE)>;
22222226

22232227
def: Pat<(setugt (i16 (and (trunc Int32Regs:$a), 255)), (i16 (and (trunc Int32Regs:$b), 255))),
2224-
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpGTU)>;
2228+
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpHI)>;
22252229
def: Pat<(setuge (i16 (and (trunc Int32Regs:$a), 255)), (i16 (and (trunc Int32Regs:$b), 255))),
2226-
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpGEU)>;
2230+
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpHS)>;
22272231
def: Pat<(setult (i16 (and (trunc Int32Regs:$a), 255)), (i16 (and (trunc Int32Regs:$b), 255))),
2228-
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpLTU)>;
2232+
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpLO)>;
22292233
def: Pat<(setule (i16 (and (trunc Int32Regs:$a), 255)), (i16 (and (trunc Int32Regs:$b), 255))),
2230-
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpLEU)>;
2234+
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpLS)>;
22312235
def: Pat<(seteq (i16 (and (trunc Int32Regs:$a), 255)), (i16 (and (trunc Int32Regs:$b), 255))),
22322236
(SETP_u32rr Int32Regs:$a, Int32Regs:$b, CmpEQ)>;
22332237
def: Pat<(setne (i16 (and (trunc Int32Regs:$a), 255)), (i16 (and (trunc Int32Regs:$b), 255))),

‎llvm/test/CodeGen/NVPTX/i8x4-instructions.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -293,16 +293,16 @@ define <4 x i8> @test_umax(<4 x i8> %a, <4 x i8> %b) #0 {
293293
; CHECK-NEXT: ld.param.u32 %r1, [test_umax_param_0];
294294
; CHECK-NEXT: bfe.s32 %r3, %r1, 24, 8;
295295
; CHECK-NEXT: bfe.s32 %r4, %r2, 24, 8;
296-
; CHECK-NEXT: setp.gtu.u32 %p1, %r3, %r4;
296+
; CHECK-NEXT: setp.hi.u32 %p1, %r3, %r4;
297297
; CHECK-NEXT: bfe.s32 %r5, %r1, 16, 8;
298298
; CHECK-NEXT: bfe.s32 %r6, %r2, 16, 8;
299-
; CHECK-NEXT: setp.gtu.u32 %p2, %r5, %r6;
299+
; CHECK-NEXT: setp.hi.u32 %p2, %r5, %r6;
300300
; CHECK-NEXT: bfe.s32 %r7, %r1, 8, 8;
301301
; CHECK-NEXT: bfe.s32 %r8, %r2, 8, 8;
302-
; CHECK-NEXT: setp.gtu.u32 %p3, %r7, %r8;
302+
; CHECK-NEXT: setp.hi.u32 %p3, %r7, %r8;
303303
; CHECK-NEXT: bfe.s32 %r9, %r1, 0, 8;
304304
; CHECK-NEXT: bfe.s32 %r10, %r2, 0, 8;
305-
; CHECK-NEXT: setp.gtu.u32 %p4, %r9, %r10;
305+
; CHECK-NEXT: setp.hi.u32 %p4, %r9, %r10;
306306
; CHECK-NEXT: selp.b32 %r11, %r9, %r10, %p4;
307307
; CHECK-NEXT: selp.b32 %r12, %r7, %r8, %p3;
308308
; CHECK-NEXT: bfi.b32 %r13, %r12, %r11, 8, 8;
@@ -363,16 +363,16 @@ define <4 x i8> @test_umin(<4 x i8> %a, <4 x i8> %b) #0 {
363363
; CHECK-NEXT: ld.param.u32 %r1, [test_umin_param_0];
364364
; CHECK-NEXT: bfe.s32 %r3, %r1, 24, 8;
365365
; CHECK-NEXT: bfe.s32 %r4, %r2, 24, 8;
366-
; CHECK-NEXT: setp.leu.u32 %p1, %r3, %r4;
366+
; CHECK-NEXT: setp.ls.u32 %p1, %r3, %r4;
367367
; CHECK-NEXT: bfe.s32 %r5, %r1, 16, 8;
368368
; CHECK-NEXT: bfe.s32 %r6, %r2, 16, 8;
369-
; CHECK-NEXT: setp.leu.u32 %p2, %r5, %r6;
369+
; CHECK-NEXT: setp.ls.u32 %p2, %r5, %r6;
370370
; CHECK-NEXT: bfe.s32 %r7, %r1, 8, 8;
371371
; CHECK-NEXT: bfe.s32 %r8, %r2, 8, 8;
372-
; CHECK-NEXT: setp.leu.u32 %p3, %r7, %r8;
372+
; CHECK-NEXT: setp.ls.u32 %p3, %r7, %r8;
373373
; CHECK-NEXT: bfe.s32 %r9, %r1, 0, 8;
374374
; CHECK-NEXT: bfe.s32 %r10, %r2, 0, 8;
375-
; CHECK-NEXT: setp.leu.u32 %p4, %r9, %r10;
375+
; CHECK-NEXT: setp.ls.u32 %p4, %r9, %r10;
376376
; CHECK-NEXT: selp.b32 %r11, %r9, %r10, %p4;
377377
; CHECK-NEXT: selp.b32 %r12, %r7, %r8, %p3;
378378
; CHECK-NEXT: bfi.b32 %r13, %r12, %r11, 8, 8;

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