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[InstCombine] Update tests. NFC.
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6 files changed

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-22
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6 files changed

+22
-22
lines changed

‎llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ define void @test(ptr %x, i32 %n) {
2929
; CHECK-NEXT: br label [[IF_END_1]]
3030
; CHECK: if.end.1:
3131
; CHECK-NEXT: [[INCDEC_PTR_1:%.*]] = getelementptr inbounds i8, ptr [[X]], i32 8
32-
; CHECK-NEXT: [[CMP_1:%.*]] = icmp sgt i32 [[REM]], 2
32+
; CHECK-NEXT: [[CMP_1:%.*]] = icmp samesign ugt i32 [[REM]], 2
3333
; CHECK-NEXT: br i1 [[CMP_1]], label [[WHILE_BODY_2:%.*]], label [[WHILE_END]]
3434
; CHECK: while.body.2:
3535
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[INCDEC_PTR_1]], align 4

‎llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ define i64 @add_i32_i64(ptr nocapture readonly %x, i32 %n) #0 {
5050
; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N:%.*]], 0
5151
; CHECK-NEXT: br i1 [[CMP6]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
5252
; CHECK: for.body.preheader:
53-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
53+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
5454
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
5555
; CHECK: vector.ph:
5656
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], 2147483644
@@ -115,7 +115,7 @@ define i64 @add_i16_i64(ptr nocapture readonly %x, i32 %n) #0 {
115115
; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N:%.*]], 0
116116
; CHECK-NEXT: br i1 [[CMP6]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
117117
; CHECK: for.body.preheader:
118-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
118+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
119119
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
120120
; CHECK: vector.ph:
121121
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], 2147483644
@@ -180,7 +180,7 @@ define i64 @add_i8_i64(ptr nocapture readonly %x, i32 %n) #0 {
180180
; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N:%.*]], 0
181181
; CHECK-NEXT: br i1 [[CMP6]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
182182
; CHECK: for.body.preheader:
183-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
183+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
184184
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
185185
; CHECK: vector.ph:
186186
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], 2147483644
@@ -562,7 +562,7 @@ define i64 @mla_i32_i64(ptr nocapture readonly %x, ptr nocapture readonly %y, i3
562562
; CHECK-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[N:%.*]], 0
563563
; CHECK-NEXT: br i1 [[CMP8]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
564564
; CHECK: for.body.preheader:
565-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
565+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
566566
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
567567
; CHECK: vector.ph:
568568
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], 2147483644
@@ -636,7 +636,7 @@ define i64 @mla_i16_i64(ptr nocapture readonly %x, ptr nocapture readonly %y, i3
636636
; CHECK-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[N:%.*]], 0
637637
; CHECK-NEXT: br i1 [[CMP10]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
638638
; CHECK: for.body.preheader:
639-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
639+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
640640
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
641641
; CHECK: vector.ph:
642642
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], 2147483640
@@ -716,7 +716,7 @@ define i64 @mla_i8_i64(ptr nocapture readonly %x, ptr nocapture readonly %y, i32
716716
; CHECK-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[N:%.*]], 0
717717
; CHECK-NEXT: br i1 [[CMP10]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
718718
; CHECK: for.body.preheader:
719-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
719+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
720720
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
721721
; CHECK: vector.ph:
722722
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], 2147483640
@@ -1326,7 +1326,7 @@ define i32 @reduction_interleave_group(i32 %n, ptr %arr) #0 {
13261326
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[N]], -1
13271327
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[TMP0]], 1
13281328
; CHECK-NEXT: [[TMP2:%.*]] = add nuw i32 [[TMP1]], 1
1329-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 7
1329+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 7
13301330
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
13311331
; CHECK: vector.ph:
13321332
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[TMP2]], -4
@@ -1451,7 +1451,7 @@ define i64 @mla_xx_sext_zext(ptr nocapture noundef readonly %x, i32 %n) #0 {
14511451
; CHECK-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N:%.*]], 0
14521452
; CHECK-NEXT: br i1 [[CMP9]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
14531453
; CHECK: for.body.preheader:
1454-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
1454+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
14551455
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
14561456
; CHECK: vector.ph:
14571457
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[N]], 2147483640
@@ -1626,7 +1626,7 @@ define i64 @interleave_doublereduct_i16_i64(ptr %x, ptr %y, i32 %n) {
16261626
; CHECK-NEXT: [[CONV11:%.*]] = sext i32 [[MUL10]] to i64
16271627
; CHECK-NEXT: [[ADD12]] = add nsw i64 [[ADD]], [[CONV11]]
16281628
; CHECK-NEXT: [[ADD13]] = add nuw nsw i32 [[I_025]], 2
1629-
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD13]], [[N]]
1629+
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[ADD13]], [[N]]
16301630
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP]]
16311631
;
16321632
entry:
@@ -1722,7 +1722,7 @@ define i64 @test_fir_q15(ptr %x, ptr %y, i32 %n) #0 {
17221722
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[N]], -1
17231723
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[TMP0]], 1
17241724
; CHECK-NEXT: [[TMP2:%.*]] = add nuw i32 [[TMP1]], 1
1725-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 7
1725+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 7
17261726
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
17271727
; CHECK: vector.ph:
17281728
; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[TMP2]], -4

‎llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,10 @@ define void @fp_iv_loop1(ptr noalias nocapture %A, i32 %N) #0 {
2121
; AUTO_VEC-NEXT: br i1 [[CMP4]], label [[ITER_CHECK:%.*]], label [[FOR_END:%.*]]
2222
; AUTO_VEC: iter.check:
2323
; AUTO_VEC-NEXT: [[ZEXT:%.*]] = zext nneg i32 [[N]] to i64
24-
; AUTO_VEC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
24+
; AUTO_VEC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
2525
; AUTO_VEC-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY:%.*]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
2626
; AUTO_VEC: vector.main.loop.iter.check:
27-
; AUTO_VEC-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp ult i32 [[N]], 32
27+
; AUTO_VEC-NEXT: [[MIN_ITERS_CHECK1:%.*]] = icmp samesign ult i32 [[N]], 32
2828
; AUTO_VEC-NEXT: br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
2929
; AUTO_VEC: vector.ph:
3030
; AUTO_VEC-NEXT: [[N_VEC:%.*]] = and i64 [[ZEXT]], 2147483616

‎llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ define nofpclass(nan inf) double @monte_simple(i32 noundef %nblocks, i32 noundef
1212
; CHECK-NEXT: br i1 [[CMP8]], label %[[FOR_BODY_PREHEADER:.*]], label %[[FOR_END:.*]]
1313
; CHECK: [[FOR_BODY_PREHEADER]]:
1414
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[RAND_BLOCK_LENGTH]] to i64
15-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[RAND_BLOCK_LENGTH]], 4
15+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[RAND_BLOCK_LENGTH]], 4
1616
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[FOR_BODY_PREHEADER23:.*]], label %[[VECTOR_PH:.*]]
1717
; CHECK: [[VECTOR_PH]]:
1818
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 2147483644
@@ -189,7 +189,7 @@ define nofpclass(nan inf) double @monte_exp(i32 noundef %nblocks, i32 noundef %R
189189
; CHECK-NEXT: br i1 [[CMP211]], label %[[FOR_BODY_US_PREHEADER:.*]], label %[[FOR_BODY:.*]]
190190
; CHECK: [[FOR_BODY_US_PREHEADER]]:
191191
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[RAND_BLOCK_LENGTH]] to i64
192-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[RAND_BLOCK_LENGTH]], 4
192+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[RAND_BLOCK_LENGTH]], 4
193193
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 2147483644
194194
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x double> poison, double [[Y]], i64 0
195195
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x double> [[BROADCAST_SPLATINSERT]], <2 x double> poison, <2 x i32> zeroinitializer
@@ -200,7 +200,7 @@ define nofpclass(nan inf) double @monte_exp(i32 noundef %nblocks, i32 noundef %R
200200
; CHECK: [[FOR_BODY_US]]:
201201
; CHECK-NEXT: [[V1_021_US:%.*]] = phi double [ [[V1_2_US_LCSSA:%.*]], %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US:.*]] ], [ 0.000000e+00, %[[FOR_BODY_US_PREHEADER]] ]
202202
; CHECK-NEXT: [[V0_020_US:%.*]] = phi double [ [[V0_2_US_LCSSA:%.*]], %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US]] ], [ 0.000000e+00, %[[FOR_BODY_US_PREHEADER]] ]
203-
; CHECK-NEXT: [[BLOCK_017_US:%.*]] = phi i32 [ [[INC9_US:%.*]], %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US]] ], [ 0, %[[FOR_BODY_US_PREHEADER]] ]
203+
; CHECK-NEXT: [[BLOCK_019_US:%.*]] = phi i32 [ [[INC9_US:%.*]], %[[FOR_COND1_FOR_INC8_CRIT_EDGE_US]] ], [ 0, %[[FOR_BODY_US_PREHEADER]] ]
204204
; CHECK-NEXT: tail call void @resample(i32 noundef [[RAND_BLOCK_LENGTH]], ptr noundef [[SAMPLES]])
205205
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[FOR_BODY3_US_PREHEADER:.*]], label %[[VECTOR_PH:.*]]
206206
; CHECK: [[VECTOR_PH]]:
@@ -273,13 +273,13 @@ define nofpclass(nan inf) double @monte_exp(i32 noundef %nblocks, i32 noundef %R
273273
; CHECK: [[FOR_COND1_FOR_INC8_CRIT_EDGE_US]]:
274274
; CHECK-NEXT: [[V0_2_US_LCSSA]] = phi double [ [[TMP26]], %[[MIDDLE_BLOCK]] ], [ [[V0_2_US]], %[[FOR_BODY3_US]] ]
275275
; CHECK-NEXT: [[V1_2_US_LCSSA]] = phi double [ [[TMP25]], %[[MIDDLE_BLOCK]] ], [ [[V1_2_US]], %[[FOR_BODY3_US]] ]
276-
; CHECK-NEXT: [[INC9_US]] = add nuw nsw i32 [[BLOCK_017_US]], 1
276+
; CHECK-NEXT: [[INC9_US]] = add nuw i32 [[BLOCK_019_US]], 1
277277
; CHECK-NEXT: [[EXITCOND26_NOT:%.*]] = icmp eq i32 [[INC9_US]], [[NBLOCKS]]
278278
; CHECK-NEXT: br i1 [[EXITCOND26_NOT]], label %[[FOR_END10]], label %[[FOR_BODY_US]]
279279
; CHECK: [[FOR_BODY]]:
280-
; CHECK-NEXT: [[BLOCK_017:%.*]] = phi i32 [ [[INC9:%.*]], %[[FOR_BODY]] ], [ 0, %[[FOR_BODY_LR_PH]] ]
280+
; CHECK-NEXT: [[BLOCK_019:%.*]] = phi i32 [ [[INC9:%.*]], %[[FOR_BODY]] ], [ 0, %[[FOR_BODY_LR_PH]] ]
281281
; CHECK-NEXT: tail call void @resample(i32 noundef [[RAND_BLOCK_LENGTH]], ptr noundef [[SAMPLES]])
282-
; CHECK-NEXT: [[INC9]] = add nuw nsw i32 [[BLOCK_017]], 1
282+
; CHECK-NEXT: [[INC9]] = add nuw i32 [[BLOCK_019]], 1
283283
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC9]], [[NBLOCKS]]
284284
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[FOR_END10]], label %[[FOR_BODY]]
285285
; CHECK: [[FOR_END10]]:

‎llvm/test/Transforms/PhaseOrdering/X86/preserve-access-group.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ define void @test(i32 noundef %nface, i32 noundef %ncell, ptr noalias noundef %f
1616
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[NFACE]] to i64
1717
; CHECK-NEXT: [[INVARIANT_GEP:%.*]] = getelementptr inbounds i32, ptr [[FACE_CELL]], i64 [[TMP0]]
1818
; CHECK-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP0]], 3
19-
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[NFACE]], 4
19+
; CHECK-NEXT: [[TMP1:%.*]] = icmp samesign ult i32 [[NFACE]], 4
2020
; CHECK-NEXT: br i1 [[TMP1]], label %[[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA:.*]], label %[[FOR_BODY_PREHEADER_NEW:.*]]
2121
; CHECK: [[FOR_BODY_PREHEADER_NEW]]:
2222
; CHECK-NEXT: [[UNROLL_ITER:%.*]] = and i64 [[TMP0]], 2147483644

‎llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,13 +20,13 @@ define void @vdiv(ptr %x, ptr %y, double %a, i32 %N) #0 {
2020
; CHECK-NEXT: [[X4:%.*]] = ptrtoint ptr [[X:%.*]] to i64
2121
; CHECK-NEXT: [[Y5:%.*]] = ptrtoint ptr [[Y:%.*]] to i64
2222
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[N]] to i64
23-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
23+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
2424
; CHECK-NEXT: [[TMP0:%.*]] = sub i64 [[X4]], [[Y5]]
2525
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 128
2626
; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[MIN_ITERS_CHECK]], i1 true, i1 [[DIFF_CHECK]]
2727
; CHECK-NEXT: br i1 [[OR_COND]], label [[FOR_BODY_PREHEADER9:%.*]], label [[VECTOR_PH:%.*]]
2828
; CHECK: vector.main.loop.iter.check:
29-
; CHECK-NEXT: [[MIN_ITERS_CHECK6:%.*]] = icmp ult i32 [[N]], 16
29+
; CHECK-NEXT: [[MIN_ITERS_CHECK6:%.*]] = icmp samesign ult i32 [[N]], 16
3030
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK6]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH1:%.*]]
3131
; CHECK: vector.ph:
3232
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[WIDE_TRIP_COUNT]], 2147483632

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