Skip to content

Commit 115c760

Browse files
dtcxzywdtcxzyw
committed
[InstCombine] Reenable DomCondCache in foldICmpUsingKnownBits 
1 parent 52361d0 commit 115c760

19 files changed

+44
-51
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6563,10 +6563,7 @@ Instruction *InstCombinerImpl::foldICmpUsingKnownBits(ICmpInst &I) {
65636563
KnownBits Op1Known(BitWidth);
65646564

65656565
{
6566-
// Don't use dominating conditions when folding icmp using known bits. This
6567-
// may convert signed into unsigned predicates in ways that other passes
6568-
// (especially IndVarSimplify) may not be able to reliably undo.
6569-
SimplifyQuery Q = SQ.getWithoutDomCondCache().getWithInstruction(&I);
6566+
SimplifyQuery Q = SQ.getWithInstruction(&I);
65706567
if (SimplifyDemandedBits(&I, 0, getDemandedBitsLHSMask(I, BitWidth),
65716568
Op0Known, /*Depth=*/0, Q))
65726569
return &I;

‎llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-value.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -214,7 +214,7 @@ define i32 @vscale_slt_with_vp_umin(ptr nocapture %A, i32 %n) mustprogress vscal
214214
; CHECK-NEXT: [[VF_CAPPED:%.*]] = call i32 @llvm.umin.i32(i32 [[VF]], i32 [[LEFT]])
215215
; CHECK-NEXT: store i32 [[VF_CAPPED]], ptr [[A:%.*]], align 4
216216
; CHECK-NEXT: [[ADD]] = add nuw nsw i32 [[I_05]], [[VF]]
217-
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[ADD]], [[N]]
217+
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[ADD]], [[N]]
218218
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
219219
; CHECK: for.end:
220220
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[N]], -1

‎llvm/test/Transforms/InstCombine/icmp-dom.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -385,7 +385,7 @@ define i8 @PR48900_alt(i8 %i, ptr %p) {
385385
; CHECK-NEXT: [[I4:%.*]] = icmp ugt i8 [[SMAX]], -128
386386
; CHECK-NEXT: br i1 [[I4]], label [[TRUELABEL:%.*]], label [[FALSELABEL:%.*]]
387387
; CHECK: truelabel:
388-
; CHECK-NEXT: [[UMIN:%.*]] = call i8 @llvm.smin.i8(i8 [[SMAX]], i8 -126)
388+
; CHECK-NEXT: [[UMIN:%.*]] = call i8 @llvm.umin.i8(i8 [[SMAX]], i8 -126)
389389
; CHECK-NEXT: ret i8 [[UMIN]]
390390
; CHECK: falselabel:
391391
; CHECK-NEXT: ret i8 0

‎llvm/test/Transforms/InstCombine/known-bits.ll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1617,9 +1617,7 @@ define i1 @test_simplify_icmp2(double %x) {
16171617
; CHECK-NEXT: [[COND:%.*]] = fcmp oeq double [[ABS]], 0x7FF0000000000000
16181618
; CHECK-NEXT: br i1 [[COND]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
16191619
; CHECK: if.then:
1620-
; CHECK-NEXT: [[CAST:%.*]] = bitcast double [[X]] to i64
1621-
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[CAST]], 3458764513820540928
1622-
; CHECK-NEXT: ret i1 [[CMP]]
1620+
; CHECK-NEXT: ret i1 false
16231621
; CHECK: if.else:
16241622
; CHECK-NEXT: ret i1 false
16251623
;

‎llvm/test/Transforms/InstCombine/phi.ll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1541,11 +1541,9 @@ define i1 @phi_knownnonzero_eq_multiuse_oricmp(i32 %n, i32 %s, ptr %P, i32 %val)
15411541
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[ORPHI]], 0
15421542
; CHECK-NEXT: br i1 [[CMP1]], label [[NEXT:%.*]], label [[CLEANUP:%.*]]
15431543
; CHECK: next:
1544-
; CHECK-NEXT: [[BOOL2:%.*]] = icmp eq i32 [[PHI]], 0
15451544
; CHECK-NEXT: br label [[CLEANUP]]
15461545
; CHECK: cleanup:
1547-
; CHECK-NEXT: [[FINAL:%.*]] = phi i1 [ false, [[IF_END]] ], [ [[BOOL2]], [[NEXT]] ]
1548-
; CHECK-NEXT: ret i1 [[FINAL]]
1546+
; CHECK-NEXT: ret i1 [[CMP1]]
15491547
;
15501548
entry:
15511549
%tobool = icmp slt i32 %n, %s

‎llvm/test/Transforms/LoopUnroll/peel-loop-inner.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,12 +10,12 @@ define void @basic(i32 %K, i32 %N) {
1010
; CHECK-NEXT: [[CMP_INNER_PEEL:%.*]] = icmp sgt i32 [[K:%.*]], 1
1111
; CHECK-NEXT: br i1 [[CMP_INNER_PEEL]], label [[INNER_PEEL2:%.*]], label [[OUTER_BACKEDGE]]
1212
; CHECK: inner.peel2:
13-
; CHECK-NEXT: [[CMP_INNER_PEEL8:%.*]] = icmp sgt i32 [[K]], 3
13+
; CHECK-NEXT: [[CMP_INNER_PEEL8:%.*]] = icmp samesign ugt i32 [[K]], 3
1414
; CHECK-NEXT: br i1 [[CMP_INNER_PEEL8]], label [[INNER:%.*]], label [[OUTER_BACKEDGE]]
1515
; CHECK: inner:
1616
; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[J_INC:%.*]], [[INNER]] ], [ 3, [[INNER_PEEL2]] ]
1717
; CHECK-NEXT: [[J_INC]] = add nuw nsw i32 [[J]], 1
18-
; CHECK-NEXT: [[CMP_INNER:%.*]] = icmp slt i32 [[J_INC]], [[K]]
18+
; CHECK-NEXT: [[CMP_INNER:%.*]] = icmp samesign ult i32 [[J_INC]], [[K]]
1919
; CHECK-NEXT: br i1 [[CMP_INNER]], label [[INNER]], label [[OUTER_BACKEDGE]], !llvm.loop [[LOOP0:![0-9]+]]
2020
; CHECK: outer.backedge:
2121
; CHECK-NEXT: [[I_INC]] = add i32 [[I]], 1

‎llvm/test/Transforms/LoopUnroll/peel-loop.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ define void @basic(ptr %p, i32 %k) #0 {
1818
; CHECK: for.body.peel2:
1919
; CHECK-NEXT: [[INCDEC_PTR_PEEL:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 4
2020
; CHECK-NEXT: store i32 1, ptr [[INCDEC_PTR_PEEL]], align 4
21-
; CHECK-NEXT: [[CMP_PEEL5:%.*]] = icmp sgt i32 [[K]], 2
21+
; CHECK-NEXT: [[CMP_PEEL5:%.*]] = icmp samesign ugt i32 [[K]], 2
2222
; CHECK-NEXT: br i1 [[CMP_PEEL5]], label [[FOR_BODY_PEEL7:%.*]], label [[FOR_END]]
2323
; CHECK: for.body.peel7:
2424
; CHECK-NEXT: [[INCDEC_PTR_PEEL3:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 8
@@ -32,7 +32,7 @@ define void @basic(ptr %p, i32 %k) #0 {
3232
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[P_ADDR_04]], i64 4
3333
; CHECK-NEXT: store i32 [[I_05]], ptr [[P_ADDR_04]], align 4
3434
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_05]], 1
35-
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[K]]
35+
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[INC]], [[K]]
3636
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP0:![0-9]+]]
3737
; CHECK: for.end:
3838
; CHECK-NEXT: ret void
@@ -78,7 +78,7 @@ define i32 @output(ptr %p, i32 %k) #0 {
7878
; CHECK: for.body.peel2:
7979
; CHECK-NEXT: [[INCDEC_PTR_PEEL:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 4
8080
; CHECK-NEXT: store i32 1, ptr [[INCDEC_PTR_PEEL]], align 4
81-
; CHECK-NEXT: [[CMP_PEEL5:%.*]] = icmp sgt i32 [[K]], 2
81+
; CHECK-NEXT: [[CMP_PEEL5:%.*]] = icmp samesign ugt i32 [[K]], 2
8282
; CHECK-NEXT: br i1 [[CMP_PEEL5]], label [[FOR_BODY_PEEL7:%.*]], label [[FOR_END]]
8383
; CHECK: for.body.peel7:
8484
; CHECK-NEXT: [[INCDEC_PTR_PEEL3:%.*]] = getelementptr inbounds i8, ptr [[P]], i64 8
@@ -92,7 +92,7 @@ define i32 @output(ptr %p, i32 %k) #0 {
9292
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[P_ADDR_04]], i64 4
9393
; CHECK-NEXT: store i32 [[I_05]], ptr [[P_ADDR_04]], align 4
9494
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_05]], 1
95-
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[K]]
95+
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i32 [[INC]], [[K]]
9696
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]], !llvm.loop [[LOOP3:![0-9]+]]
9797
; CHECK: for.end:
9898
; CHECK-NEXT: [[RET:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 1, [[FOR_BODY_PEEL]] ], [ 2, [[FOR_BODY_PEEL2]] ], [ 3, [[FOR_BODY_PEEL7]] ], [ [[INC]], [[FOR_BODY]] ]

‎llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ define void @vector_reverse_mask_v4i1(ptr noalias %a, ptr noalias %cond, i64 %N)
2323
; CHECK-NEXT: [[CMP7:%.*]] = icmp sgt i64 [[N:%.*]], 0
2424
; CHECK-NEXT: br i1 [[CMP7]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
2525
; CHECK: for.body.preheader:
26-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 8
26+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i64 [[N]], 8
2727
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
2828
; CHECK: vector.ph:
2929
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[N]], 9223372036854775800

‎llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -138,7 +138,7 @@ define void @fp_iv_loop2(ptr noalias nocapture %A, i32 %N) {
138138
; AUTO_VEC: for.body.preheader:
139139
; AUTO_VEC-NEXT: [[ZEXT:%.*]] = zext nneg i32 [[N]] to i64
140140
; AUTO_VEC-NEXT: [[XTRAITER:%.*]] = and i64 [[ZEXT]], 7
141-
; AUTO_VEC-NEXT: [[TMP0:%.*]] = icmp ult i32 [[N]], 8
141+
; AUTO_VEC-NEXT: [[TMP0:%.*]] = icmp samesign ult i32 [[N]], 8
142142
; AUTO_VEC-NEXT: br i1 [[TMP0]], label [[FOR_END_LOOPEXIT_UNR_LCSSA:%.*]], label [[FOR_BODY_PREHEADER_NEW:%.*]]
143143
; AUTO_VEC: for.body.preheader.new:
144144
; AUTO_VEC-NEXT: [[UNROLL_ITER:%.*]] = and i64 [[ZEXT]], 2147483640

‎llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ define i32 @inv_load_conditional(ptr %a, i64 %n, ptr %b, i32 %k) {
2020
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
2121
; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[VEC_EPILOG_SCALAR_PH]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
2222
; CHECK: vector.main.loop.iter.check:
23-
; CHECK-NEXT: [[MIN_ITERS_CHECK3:%.*]] = icmp slt i64 [[N]], 16
23+
; CHECK-NEXT: [[MIN_ITERS_CHECK3:%.*]] = icmp samesign ult i64 [[N]], 16
2424
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK3]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
2525
; CHECK: vector.ph:
2626
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775792

‎llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ define i32 @inv_val_store_to_inv_address_with_reduction(ptr %a, i64 %n, ptr %b)
2323
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
2424
; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[VEC_EPILOG_SCALAR_PH]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
2525
; CHECK: vector.main.loop.iter.check:
26-
; CHECK-NEXT: [[MIN_ITERS_CHECK3:%.*]] = icmp slt i64 [[N]], 64
26+
; CHECK-NEXT: [[MIN_ITERS_CHECK3:%.*]] = icmp samesign ult i64 [[N]], 64
2727
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK3]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
2828
; CHECK: vector.ph:
2929
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775744
@@ -137,7 +137,7 @@ define void @inv_val_store_to_inv_address_conditional(ptr %a, i64 %n, ptr %b, i3
137137
; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
138138
; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[VEC_EPILOG_SCALAR_PH]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
139139
; CHECK: vector.main.loop.iter.check:
140-
; CHECK-NEXT: [[MIN_ITERS_CHECK3:%.*]] = icmp slt i64 [[N]], 16
140+
; CHECK-NEXT: [[MIN_ITERS_CHECK3:%.*]] = icmp samesign ult i64 [[N]], 16
141141
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK3]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
142142
; CHECK: vector.ph:
143143
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX2]], 9223372036854775792
@@ -279,7 +279,7 @@ define void @variant_val_store_to_inv_address_conditional(ptr %a, i64 %n, ptr %b
279279
; CHECK-NEXT: [[CONFLICT_RDX9:%.*]] = or i1 [[CONFLICT_RDX]], [[FOUND_CONFLICT8]]
280280
; CHECK-NEXT: br i1 [[CONFLICT_RDX9]], label [[VEC_EPILOG_SCALAR_PH]], label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
281281
; CHECK: vector.main.loop.iter.check:
282-
; CHECK-NEXT: [[MIN_ITERS_CHECK11:%.*]] = icmp slt i64 [[N]], 16
282+
; CHECK-NEXT: [[MIN_ITERS_CHECK11:%.*]] = icmp samesign ult i64 [[N]], 16
283283
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK11]], label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH:%.*]]
284284
; CHECK: vector.ph:
285285
; CHECK-NEXT: [[N_VEC:%.*]] = and i64 [[SMAX10]], 9223372036854775792

‎llvm/test/Transforms/LoopVectorize/float-induction.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ define void @fp_iv_loop1_fast_FMF(float %init, ptr noalias nocapture %A, i32 %N)
2525
; VEC4_INTERL1: for.body.lr.ph:
2626
; VEC4_INTERL1-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4
2727
; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
28-
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
28+
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
2929
; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
3030
; VEC4_INTERL1: vector.ph:
3131
; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483644
@@ -80,7 +80,7 @@ define void @fp_iv_loop1_fast_FMF(float %init, ptr noalias nocapture %A, i32 %N)
8080
; VEC4_INTERL2: for.body.lr.ph:
8181
; VEC4_INTERL2-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4
8282
; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
83-
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
83+
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
8484
; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
8585
; VEC4_INTERL2: vector.ph:
8686
; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483640
@@ -272,7 +272,7 @@ define void @fp_iv_loop1_reassoc_FMF(float %init, ptr noalias nocapture %A, i32
272272
; VEC4_INTERL1: for.body.lr.ph:
273273
; VEC4_INTERL1-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4
274274
; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
275-
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
275+
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
276276
; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
277277
; VEC4_INTERL1: vector.ph:
278278
; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483644
@@ -327,7 +327,7 @@ define void @fp_iv_loop1_reassoc_FMF(float %init, ptr noalias nocapture %A, i32
327327
; VEC4_INTERL2: for.body.lr.ph:
328328
; VEC4_INTERL2-NEXT: [[FPINC:%.*]] = load float, ptr @fp_inc, align 4
329329
; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
330-
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
330+
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
331331
; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
332332
; VEC4_INTERL2: vector.ph:
333333
; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483640
@@ -522,7 +522,7 @@ define void @fp_iv_loop2(float %init, ptr noalias nocapture %A, i32 %N) #0 {
522522
; VEC4_INTERL1-NEXT: br i1 [[CMP4]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
523523
; VEC4_INTERL1: for.body.preheader:
524524
; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
525-
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
525+
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
526526
; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
527527
; VEC4_INTERL1: vector.ph:
528528
; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483644
@@ -570,7 +570,7 @@ define void @fp_iv_loop2(float %init, ptr noalias nocapture %A, i32 %N) #0 {
570570
; VEC4_INTERL2-NEXT: br i1 [[CMP4]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
571571
; VEC4_INTERL2: for.body.preheader:
572572
; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
573-
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
573+
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
574574
; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
575575
; VEC4_INTERL2: vector.ph:
576576
; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483640
@@ -754,7 +754,7 @@ define void @fp_iv_loop3(float %init, ptr noalias nocapture %A, ptr noalias noca
754754
; VEC4_INTERL1: for.body.lr.ph:
755755
; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = load float, ptr @fp_inc, align 4
756756
; VEC4_INTERL1-NEXT: [[TMP1:%.*]] = zext nneg i32 [[N]] to i64
757-
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
757+
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
758758
; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
759759
; VEC4_INTERL1: vector.ph:
760760
; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = and i64 [[TMP1]], 2147483644
@@ -831,7 +831,7 @@ define void @fp_iv_loop3(float %init, ptr noalias nocapture %A, ptr noalias noca
831831
; VEC4_INTERL2: for.body.lr.ph:
832832
; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = load float, ptr @fp_inc, align 4
833833
; VEC4_INTERL2-NEXT: [[TMP1:%.*]] = zext nneg i32 [[N]] to i64
834-
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
834+
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
835835
; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
836836
; VEC4_INTERL2: vector.ph:
837837
; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = and i64 [[TMP1]], 2147483640
@@ -1107,7 +1107,7 @@ define void @fp_iv_loop4(ptr noalias nocapture %A, i32 %N) {
11071107
; VEC4_INTERL1-NEXT: br i1 [[CMP4]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
11081108
; VEC4_INTERL1: for.body.preheader:
11091109
; VEC4_INTERL1-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
1110-
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
1110+
; VEC4_INTERL1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
11111111
; VEC4_INTERL1-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
11121112
; VEC4_INTERL1: vector.ph:
11131113
; VEC4_INTERL1-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483644
@@ -1152,7 +1152,7 @@ define void @fp_iv_loop4(ptr noalias nocapture %A, i32 %N) {
11521152
; VEC4_INTERL2-NEXT: br i1 [[CMP4]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
11531153
; VEC4_INTERL2: for.body.preheader:
11541154
; VEC4_INTERL2-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
1155-
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 8
1155+
; VEC4_INTERL2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 8
11561156
; VEC4_INTERL2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
11571157
; VEC4_INTERL2: vector.ph:
11581158
; VEC4_INTERL2-NEXT: [[N_VEC:%.*]] = and i64 [[TMP0]], 2147483640

‎llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define i32 @foo(ptr nocapture %A, ptr nocapture %B, i32 %n) {
1010
; CHECK-NEXT: br i1 [[CMP26]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
1111
; CHECK: for.body.preheader:
1212
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
13-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
13+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
1414
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
1515
; CHECK: vector.memcheck:
1616
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[N]], -1
@@ -117,7 +117,7 @@ define i32 @multi_variable_if_nest(ptr nocapture %A, ptr nocapture %B, i32 %n) {
117117
; CHECK-NEXT: br i1 [[CMP26]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
118118
; CHECK: for.body.preheader:
119119
; CHECK-NEXT: [[TMP0:%.*]] = zext nneg i32 [[N]] to i64
120-
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 4
120+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp samesign ult i32 [[N]], 4
121121
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
122122
; CHECK: vector.memcheck:
123123
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[N]], -1

0 commit comments

Comments
 (0)