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7 changes: 7 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -122,5 +122,12 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned BuiltinID,
voidTy)
.getResult();
}
case X86::BI__rdtsc: {
mlir::Type intTy = cir::IntType::get(&getMLIRContext(), 64, false);
return builder
.create<cir::LLVMIntrinsicCallOp>(
getLoc(E->getExprLoc()), builder.getStringAttr("x86.rdtsc"), intTy)
.getResult();
}
}
}
8 changes: 8 additions & 0 deletions clang/test/CIR/CodeGen/X86/builtins-x86.c
Original file line number Diff line number Diff line change
Expand Up @@ -29,3 +29,11 @@ void test_mm_pause() {
// CIR: {{%.*}} = cir.llvm.intrinsic "x86.sse2.pause" : () -> !void
// LLVM: call void @llvm.x86.sse2.pause()
}

unsigned long long test_rdtsc() {
// CIR-LABEL: @test_rdtsc
// LLVM-LABEL: @test_rdtsc
return __rdtsc();
// CIR: {{%.*}} = cir.llvm.intrinsic "x86.rdtsc" : () -> !u64i
// LLVM: call i64 @llvm.x86.rdtsc
}
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