Khadas vims 4.9.y

arch/arm64/boot/dts/amlogic/kvim3_linux.dts

@@ -1444,6 +1444,7 @@
 
 &pcie_A {
 	reset-gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>;
+	wake-gpio = <&gpio GPIOA_7 GPIO_ACTIVE_HIGH>;
 	status = "disabled";
 };
 

arch/arm64/boot/dts/amlogic/kvim3l_linux.dts

@@ -1796,6 +1796,7 @@
 
 &pcie_A {
 	reset-gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>;
+	wake-gpio = <&gpio GPIOA_7 GPIO_ACTIVE_HIGH>;
 	status = "disabled";
 };
 

arch/arm64/configs/kvims_defconfig

@@ -617,11 +617,68 @@ CONFIG_USB_DWC3_HOST=y
 CONFIG_USB_SERIAL=y
 CONFIG_USB_SERIAL_CONSOLE=y
 CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_CH341=y
-CONFIG_USB_SERIAL_CP210X=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_PL2303=y
-CONFIG_USB_SERIAL_OPTION=y
+CONFIG_USB_SERIAL_SIMPLE=m
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_CH341=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_F81232=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_IUU=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_METRO=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+CONFIG_USB_SERIAL_MXUPORT=m
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_OTI6858=m
+CONFIG_USB_SERIAL_QCAUX=m
+CONFIG_USB_SERIAL_QUALCOMM=m
+CONFIG_USB_SERIAL_SPCP8X5=m
+CONFIG_USB_SERIAL_SAFE=m
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_SYMBOL=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_SERIAL_OPTICON=m
+CONFIG_USB_SERIAL_XSENS_MT=m
+CONFIG_USB_SERIAL_WISHBONE=m
+CONFIG_USB_SERIAL_SSU100=m
+CONFIG_USB_SERIAL_QT2=m
+CONFIG_USB_SERIAL_DEBUG=m
 CONFIG_USB_ISP1301=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_CONFIGFS=y
@@ -670,6 +727,7 @@ CONFIG_PWM=y
 CONFIG_ANDROID=y
 CONFIG_MALI_MIDGARD=m
 CONFIG_MALI_EXPERT=y
+CONFIG_PCIE_RM500Q=m
 CONFIG_EXT3_FS=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y

drivers/Kconfig

@@ -208,4 +208,6 @@ source "drivers/tee/Kconfig"
 
 source "drivers/gpu/arm/Kconfig"
 
+source "drivers/pcie_mhi/Kconfig"
+
 endmenu

drivers/Makefile

@@ -177,3 +177,4 @@ obj-$(CONFIG_NVMEM)		+= nvmem/
 obj-$(CONFIG_FPGA)		+= fpga/
 obj-$(CONFIG_TEE)		+= tee/
 obj-$(CONFIG_AMLOGIC_DRIVER) 	+= amlogic/
+obj-$(CONFIG_PCIE_RM500Q)       += pcie_mhi/

drivers/amlogic/wifi/wifi_dt.c

@@ -332,7 +332,7 @@ static long wifi_power_ioctl(struct file *filp,
 		mdelay(200);
 		set_usb_wifi_power(1);
 		mdelay(200);
-		pci_reinit();
+//		pci_reinit();
 		WIFI_INFO("Set sdio wifi power up!\n");
 		break;
 	case WIFI_POWER_DOWN:

drivers/pcie_mhi/Kconfig

@@ -0,0 +1,6 @@
+config PCIE_RM500Q
+    tristate "Quectel 5G Module"
+    default n
+    help
+      QUECTEL 5G Module with PCIe
+

drivers/pcie_mhi/Makefile

@@ -0,0 +1,34 @@
+#ccflags-y += -g
+obj-$(CONFIG_PCIE_RM500Q) += pcie_mhi.o
+pcie_mhi-objs := core/mhi_init.o core/mhi_main.o core/mhi_pm.o core/mhi_boot.o core/mhi_dtr.o  controllers/mhi_qti.o
+pcie_mhi-objs += devices/mhi_uci.o
+
+ifeq (1,1)
+pcie_mhi-objs += devices/mhi_netdev_quectel.o
+else
+pcie_mhi-objs += devices/mhi_netdev.o
+pcie_mhi-objs += devices/rmnet_handler.o
+endif
+
+PWD := $(shell pwd)
+ifeq ($(ARCH),)
+ARCH := $(shell uname -m)
+endif
+ifeq ($(CROSS_COMPILE),)
+CROSS_COMPILE :=
+endif
+ifeq ($(KDIR),)
+KDIR := /lib/modules/$(shell uname -r)/build
+endif
+
+pcie_mhi: clean
+	$(MAKE) ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE} -C $(KDIR) M=$(PWD) modules
+	#cp pcie_mhi.ko /tftpboot/
+
+clean:
+	$(MAKE) ARCH=${ARCH} CROSS_COMPILE=${CROSS_COMPILE} -C $(KDIR) M=$(PWD) clean
+	find . -name *.o.ur-safe | xargs rm -f
+
+install: pcie_mhi
+	sudo cp pcie_mhi.ko /lib/modules/${shell uname -r}/kernel/drivers/pci/
+	sudo depmod

drivers/pcie_mhi/README

@@ -0,0 +1,36 @@
+1. porting pcie_mhi driver as next
+
+$ git diff drivers/Makefile
+diff --git a/drivers/Makefile b/drivers/Makefile
+index 77fbc52..e45837e 100644
+--- a/drivers/Makefile
++++ b/drivers/Makefile
+@@ -184,3 +184,4 @@ obj-$(CONFIG_FPGA)          += fpga/
+ obj-$(CONFIG_FSI)              += fsi/
+ obj-$(CONFIG_TEE)              += tee/
+ obj-$(CONFIG_MULTIPLEXER)      += mux/
++obj-y          += pcie_mhi/
+
+$ tree drivers/pcie_mhi/ -L 1
+drivers/pcie_mhi/
+ controllers
+ core
+ devices
+ Makefile
+
+2. check RG500 attach pcie_mhi driver successful 
+
+root@OpenWrt:/# lspci
+00:00.0 Class 0604: 17cb:0302
+01:00.0 Class ff00: 17cb:0306
+
+root@OpenWrt:~# dmesg | grep mhi
+[  138.483252] mhi_init Quectel_Linux_PCIE_MHI_Driver_V1.3.0.6
+[  138.492350] mhi_pci_probe pci_dev->name = 0000:01:00.0, domain=0, bus=1, slot=0, vendor=17CB, device=0306
+
+3. how to use, see next logs
+
+log/QXDM_OVER_PCIE.txt
+log/AT_OVER_PCIE.txt
+log/MBIM_OVER_PCIE.txt
+log/QMI_OVER_PCIE.txt

drivers/pcie_mhi/ReleaseNote.txt

@@ -0,0 +1,79 @@
+Release Notes
+
+[V1.3.3]
+Date:   5/18/2022
+enhancement:
+fix:
+ 1. Fix not synchronize access rp/wp when mhi_queue_xxx and mhi_process_xxx_ring run on different CPU
+
+[V1.3.2]
+Date:   12/16/2021
+enhancement:
+  1. support Linux Kernel V5.14
+  2. mhi_netdev_quectel.c do not print log in softirq context
+
+[V1.3.1]
+Date:   9/26/2021
+enhancement:
+fix:
+
+[V1.3.0.19]
+Date:   9/18/2021
+enhancement:
+  1. support sdx62 (17cb:0308)
+	2. support IPQ5018's NSS
+	3. use 'qsdk/qca/src/data-kernel/drivers/rmnet-nss/rmnet_nss.c' instead myself rmnet_nss.c
+	   and pcie_mhi.ko must load after then rmnet_nss.ko
+	4. allow bhi irq is not 0 (for ipq5018)
+fix:
+
+[V1.3.0.18]
+Date:   4/14/2021
+enhancement:
+  1. support mbim multiple call, usage:
+     # insmod pcie_mhi.ko mhi_mbim_enabeld=1 qmap_mode=4
+     # quectel-mbim-proxy -d /dev/mhi_MBIM &
+     # quectel-CM -n X
+fix:
+
+[V1.3.0.17]
+Date:   3/11/2021
+enhancement:
+fix:
+  1. fix CPU loading very high when TPUT test when only one MSI interrupt
+  2. fix error on latest X24 modem
+
+[V1.3.0.16]
+Date:   11/18/2020
+enhancement:
+fix:
+  1. add ring size to 32, for in-bound chan, if one ring is full, modem will not generate MSI interrupt for all chan
+
+[V1.3.0.15]
+Date:   10/30/2020
+enhancement:
+	1. support multi-modems, named as /dev/mhi_<chan_name>X
+fix:
+  1. fix compile error on kernel v5.8
+
+[V1.3.0.14]
+Date:   10/9/2020
+enhancement:
+  1. suppport EM120&EM160
+fix:
+  1. fix compile error on kernel v5.6
+  2. support runtime suspend
+
+[V1.3.0.13]
+Date:   9/7/2020 
+enhancement:
+  1. suppport EM120&EM160
+fix:
+  1. fix error on X55 + PCIE2.0(e.g IPQ4019)
+  2. support runtime suspend
+
+[V1.3.0.12]
+Date:   7/7/2020 
+enhancement:
+  1. suppport create only none netcard (enabled by marco MHI_NETDEV_ONE_CARD_MODE),
+fix:

drivers/pcie_mhi/controllers/Kconfig

@@ -0,0 +1,13 @@
+menu "MHI controllers"
+
+config MHI_QTI
+       tristate "MHI QTI"
+       depends on MHI_BUS
+       help
+	  If you say yes to this option, MHI bus support for QTI modem chipsets
+	  will be enabled. QTI PCIe based modems uses MHI as the communication
+	  protocol. MHI control driver is the bus master for such modems. As the
+	  bus master driver, it oversees power management operations such as
+	  suspend, resume, powering on and off the device.
+
+endmenu

drivers/pcie_mhi/controllers/Makefile

@@ -0,0 +1 @@
+obj-$(CONFIG_MHI_QTI) += mhi_qti.o mhi_arch_qti.o