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Apr 24, 2024
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f430e37
[llvm] Drop unaligned from calls to readNext (NFC) (#88841)
kazutakahirata Apr 16, 2024
281d716
[X86] Change how we treat functions with explicit sections as small/l…
aeubanks Apr 16, 2024
191be2a
update_test_checks: pre-commit a new test
nhaehnle Apr 8, 2024
e770249
update_test_checks: add new test
nhaehnle Apr 3, 2024
377a276
update_test_checks: remove an unused function
nhaehnle Apr 3, 2024
9ec6c5d
[flang][cuda] Add fir.deallocate operation (#88839)
clementval Apr 16, 2024
6eb8559
Merge from 'main' to 'sycl-web' (3 commits)
t-demchuk Apr 16, 2024
34777c2
[VPlan] Don't mark VPBlendRecipe as phi-like.
fhahn Apr 16, 2024
b6bd41d
[InstCombine] Add canonicalization of `sitofp` -> `uitofp nneg`
goldsteinn Mar 21, 2024
885b8d9
[RISCV] Enable mul strength reduction for XTheadBa
preames Apr 16, 2024
c6e0162
Revert "Reapply "[LV] Improve AnyOf reduction codegen. (#78304)""
aeubanks Apr 16, 2024
266b2a2
[ValueTracking] Add tests for `computeKnownFPClass` of `llvm.vector.r…
goldsteinn Apr 10, 2024
9eeae44
[ValueTracking] Implement `computeKnownFPClass` for `llvm.vector.redu…
goldsteinn Apr 10, 2024
d19bd05
Clang Release Notes: Fix reST formatting
hubert-reinterpretcast Apr 16, 2024
3074060
[memprof] Use SizeIs (NFC) (#88984)
kazutakahirata Apr 16, 2024
b1385db
[libc][NFC] fix typo in fenv type proxy headers (#88982)
michaelrj-google Apr 16, 2024
8aa061f
[mlir][sparse][NFC] switching to using `let argments/results` in td f…
Apr 16, 2024
2be7088
Merge from 'main' to 'sycl-web' (9 commits)
t-demchuk Apr 16, 2024
9067070
[RISCV] Re-separate unaligned scalar and vector memory features in th…
topperc Apr 16, 2024
988ffd0
Add asan tests for libsanitizers. (#88349) (#88962)
usama54321 Apr 16, 2024
5005c0b
Merge from 'sycl' to 'sycl-web' (1 commits)
Apr 16, 2024
50a3717
[X86] Fix instr desc of CFCMOV's 'mr' variants
darkbuck Apr 16, 2024
1bc0921
[bazel] Add support for lldb-server (#88989)
keith Apr 16, 2024
be50a25
Update foldFMulReassoc to respect absent fast-math flags (#88589)
Apr 16, 2024
ce5381e
[mlir][vector] Determine vector sizes from the result shape in the ca…
pashu123 Apr 17, 2024
8c9f45e
[ARM64EC] Fix arm_neon.h on ARM64EC. (#88572)
efriedma-quic Apr 17, 2024
8c9d814
[mlir][complex] Fastmath flag for complex angle (#88658)
Lewuathe Apr 17, 2024
efd6055
Revert "[SLP]Attempt to vectorize long stores, if short one failed."
nikic Apr 17, 2024
7c26889
[Sparc] Fix instr desc of special register stores
darkbuck Apr 16, 2024
62853a2
[TableGen][InstrInfoEmitter] Count sub-operands on def operands
darkbuck Apr 16, 2024
d0f718e
Revert "Improve stack usage to increase recursive initialization dept…
vitalybuka Apr 17, 2024
1f35e72
[clang][builtin] Implement __builtin_allow_runtime_check (#87568)
vitalybuka Apr 17, 2024
52a4d81
[BOLT][NFC] Remove unused function (#89009)
maksfb Apr 17, 2024
0af8cae
[BOLT][NFC] Remove another unused function (#89011)
maksfb Apr 17, 2024
f40f4fc
[clang analysis] ExprMutationAnalyzer support recursive forwarding re…
HerrCai0907 Apr 17, 2024
3204f3e
[RISCV] Convert VTYPE operand check to assert in RISCVInsertVSETVLI. NFC
lukel97 Apr 17, 2024
c81e5fa
[RISCV] Add CFI information for vector callee-saved registers (#86811)
4vtomat Apr 17, 2024
e6ecff8
[C++20] [Modules] Add Release Notes and Documents for Reduced BMI
ChuanqiXu9 Apr 17, 2024
eafd515
[clang][deps] Support single-file mode for all formats (#88764)
jansvoboda11 Apr 17, 2024
6a4eaf9
[clang][deps] Add `-o` flag to specify output path (#88767)
jansvoboda11 Apr 17, 2024
db0f93b
Merge from 'main' to 'sycl-web' (1 commits)
haonanya1 Apr 17, 2024
f71e25b
[memprof] Simplify IndexedMemProfRecord::operator== (NFC) (#88986)
kazutakahirata Apr 17, 2024
f282ca7
Merge from 'sycl' to 'sycl-web' (1 commits)
Apr 17, 2024
ab4ad9e
Merge from 'main' to 'sycl-web' (1 commits)
haonanya1 Apr 17, 2024
fca2a49
[RISCV] Simplify FindRegWithEncoding in copyPhysRegVector. NFC (#89001)
topperc Apr 17, 2024
a6fcbcc
[libc++][TZDB] Improves time zone format specifiers. (#85797)
mordante Apr 17, 2024
e096c14
[analyzer] Fix a security.cert.env.InvalidPtr crash
steakhal Apr 17, 2024
024281d
[analyzer] Harden security.cert.env.InvalidPtr checker fn matching
steakhal Apr 17, 2024
b851c7f
[clang][dataflow] Support `StmtExpr` in `PropagateResultObject()`. (#…
martinboehme Apr 17, 2024
4714883
[mlir][python] Add `walk` method to PyOperationBase (#87962)
uenoku Apr 17, 2024
5214139
Merge from 'main' to 'sycl-web' (12 commits)
haonanya1 Apr 17, 2024
1bccbe1
[clang][dataflow] Treat `BuiltinBitCastExpr` correctly in `PropagateR…
martinboehme Apr 17, 2024
64c6495
[clang][NFC] Move `Sema::SkipBodyInfo` into namespace scope
Endilll Apr 17, 2024
16f1887
CompilerRT: Normalize COMPILER_RT_DEFAULT_TARGET_TRIPLE (#88835)
wzssyqa Apr 17, 2024
b090569
[RISCV] Support Zama16b1p0 (#88474)
jaidTw Apr 17, 2024
d35a643
Revert "Fix test from #83124 and #88902"
metaflow Apr 17, 2024
dbda478
Revert "[Clang][Sema] placement new initializes typedef array with co…
metaflow Apr 17, 2024
dd84d23
Revert "[Clang][Sema] placement new initializes typedef array with co…
metaflow Apr 17, 2024
bc3620d
AMDGPU: Move libcall simplify into PeepholeEP (#88853)
arsenm Apr 17, 2024
e11b17a
[clang][NFC] Refactor `Sema::CheckedConversionKind`
Endilll Apr 17, 2024
49b209d
Revert "[Libomptarget] Rework Record & Replay to be a plugin member" …
jplehr Apr 17, 2024
9f3334e
[mlir][SparseTensor] Add missing dependent dialect to pass (#88870)
matthias-springer Apr 17, 2024
889dfd4
[libc][msan] Fix "non-constexpr function '__msan_unpoison' cannot be …
gchatelet Apr 17, 2024
17b86d5
[X86][NFC] Add test cases for pr88958
phoebewang Apr 17, 2024
d1a69e4
Move gfni for bitreverse check out of SSSE3. (#88938)
shamithoke Apr 17, 2024
a16bb07
[lldb][test] Improve invalid compiler error message
DavidSpickett Apr 17, 2024
d9a5aa8
[PatternMatch] Do not accept undef elements in m_AllOnes() and friend…
nikic Apr 17, 2024
971237d
[flang] Retain internal and BIND(C) host procedure link in FIR (#87796)
jeanPerier Apr 17, 2024
b512df6
[SPIR-V] Improve Tablegen instruction selection and account for a poi…
VyacheslavLevytskyy Apr 17, 2024
42d801d
[SPIR-V] Account for zext in a llvm intrinsic call (#88903)
VyacheslavLevytskyy Apr 17, 2024
fa61f06
Fix threadprivate variable scope inside BLOCK construct. (#88921)
harishch4 Apr 17, 2024
cbe148b
[LV][NFC] Remove the declaration of function `fixReduction`. (#88491)
Mel-Chen Apr 17, 2024
a9bafe9
[VPlan] Split VPWidenMemoryInstructionRecipe (NFCI). (#87411)
fhahn Apr 17, 2024
f4737a2
update_test_checks: keep names stable with generated functions (#87988)
nhaehnle Apr 17, 2024
3eb0ba3
[MLIR][Flang][OpenMP] Make omp.simdloop into a loop wrapper (#87365)
skatrak Apr 17, 2024
16b0be6
[MLIR][OpenMP] NFC: Remove LoopControl parsing/printing code (#88909)
skatrak Apr 17, 2024
a020199
[RISCV] Assert only valid AVLs in doLocalPostpass are X0 or virtual r…
lukel97 Apr 17, 2024
a634f3e
[RemoveDIs] Update update_test_checks script to recognize dbg_records…
SLTozer Apr 17, 2024
792d437
[clang-tidy NFC] Fix a typo in docs for sizeof-expression (#88912)
NagyDonat Apr 17, 2024
7881c13
Merge from 'main' to 'sycl-web'
Apr 17, 2024
5f3e106
[lldb/linux] Make sure the process continues running after a detach (…
labath Apr 17, 2024
c8dca5b
[Flang][OpenMP][Lower] Refactor lowering of compound constructs (#87070)
skatrak Apr 17, 2024
06eedff
[analyzer] Use explicit call description mode in iterator checkers (#…
NagyDonat Apr 17, 2024
631c5e8
[mlir] fix intNEQValue summary (#89029)
MbjYjbpivj Apr 17, 2024
d57907d
[libc++] Add missing iterator requirement checks in the PSTL (#88127)
ldionne Apr 17, 2024
6c78530
[X86] vector-shuffle-combining-sse41.ll - add missing AVX1/2/512 chec…
RKSimon Apr 17, 2024
37b26bf
[mlir] transform.apply_patterns support more config options (#88484)
ftynse Apr 17, 2024
4536ad4
[RISCV] Fix clang-tidy warning about else after return. NFC
lukel97 Apr 17, 2024
86a7828
[TailDuplicator] Add maximum predecessors and successors to consider …
dianqk Apr 17, 2024
915c84b
[lldb] Fix evaluation of expressions with static initializers (#89063)
labath Apr 17, 2024
79726ef
[VP] Correct lowering of predicated fma and faddmul to avoid strictfp…
kpneal Apr 17, 2024
7b8625e
[AMDGPU][Docs] Fix broken link to HRF memory model reference (#88696)
ritter-x2a Apr 17, 2024
971ec1f
[Inline] Regenerate inline-switch-default-2.ll (NFC)
dianqk Apr 17, 2024
73140da
[mlir] expose transform dialect symbol merge to python (#87690)
ftynse Apr 17, 2024
20d653f
[LLVM][CodeGen] Fix register lane liveness tracking in RegisterPressu…
kparzysz Apr 17, 2024
9f263ee
Merge from 'sycl' to 'sycl-web' (1 commits)
haonanya1 Apr 17, 2024
1fc72db
[RISCV] Add test for doLocalPostpass issue not checking if VL was mod…
lukel97 Apr 17, 2024
76ad289
[PowerPC] 32-bit large code-model support for toc-data (#85129)
syzaara Apr 17, 2024
edbeae3
[RISCV] Explicitly bail if something modifies VL/VTYPE in doLocalPost…
lukel97 Apr 17, 2024
3820571
[C99] Remove WG14 N522 from the C status page
AaronBallman Apr 16, 2024
41b7341
[VPlan] Factor out helper to recursively collect all users (NFCI).
fhahn Apr 17, 2024
856d1c4
[AMDGPU] Fix predicates for BUFFER_ATOMIC_FMIN/FMAX patterns (#89066)
jayfoad Apr 17, 2024
4f88c23
[mlir][py] Add NVGPU's `TensorMapDescriptorType` in py bindings (#88855)
grypp Apr 17, 2024
fda04b1
[libc] Replace mentions of `LIBC_FULLBUILD` with `LLVM_LIBC_FULL_BUIL…
Rajveer100 Apr 17, 2024
d558c09
[NFC] Clean dead code in ParsedAttr.h (#89064)
yronglin Apr 17, 2024
dbafcd7
[lldb] XFAIL TestDetachResumes on windows
labath Apr 17, 2024
e490435
[CostModel][X86] Update BITREVERSE costs for GFNI targets
RKSimon Apr 17, 2024
4a5ab13
[VectorCombine] Remove single quotes from "-passes=vector-combine"
RKSimon Apr 17, 2024
5d31435
[VPlan] Check for VPWidenLoadRecipe directly in truncateToMinBW. (NFCI).
fhahn Apr 17, 2024
812963f
[libc++][chrono] Improves date formatting. (#86127)
mordante Apr 17, 2024
458328a
[clang][NFC] Refactor `Sema::RedeclarationKind`
Endilll Apr 17, 2024
950bb09
Revert "[Clang][AArch64] Warn when calling non/streaming about vector…
Apr 17, 2024
b854a23
[libc][c23][fenv] Implement fetestexceptflag (#87828)
robincaloudis Apr 17, 2024
8656d4c
[Clang][Parse] Diagnose requires expressions with explicit object par…
sdkrystian Apr 17, 2024
abd5e45
[compiler-rt] Use __atomic builtins whenever possible
arichardson Apr 17, 2024
a88ea8f
[flang][cuda] Update memory effect on fir.cuda_allocate op (#88930)
clementval Apr 17, 2024
da70f2c
[flang][cuda] Lower ALLOCATE for device variable (#88980)
clementval Apr 17, 2024
19c6a7f
[FMV] Remove useless features according the latest ACLE spec. (#88965)
labrinea Apr 17, 2024
06947b9
[libc][POSIX][pthreads] implement pthread_condattr_t functions (#88987)
nickdesaulniers Apr 17, 2024
4edeaff
[mlir][tosa] Fix tosa.Resize-to-linalg lowering (#88514)
fabrizio-indirli Apr 17, 2024
564f9ab
[bazel][mlir] Add missing dep after 4f88c2311130791cf69da34b743b1b3ba…
slackito Apr 17, 2024
e59632b
[RISCV] Fix typo in RISCVScheduleV.td that was introduced in 60a1158
michaelmaitland Apr 17, 2024
676d3ba
[bazel][libc] Add missing dep after b854a2323337be2633b1135f590678a17…
slackito Apr 17, 2024
693a458
[MLIR] Update doc comment in ViewLikeInterface.td (NFC) (#89074)
abdulraheembeigh Apr 17, 2024
6f7160e
[SLP]Attempt to vectorize long stores, if short one failed.
alexey-bataev Apr 16, 2024
eefee38
[libc] set cmake dependencies for condattr test (#89103)
nickdesaulniers Apr 17, 2024
8255360
[CostModel][X86] Add basic GFNI target test coverage for shift/rotate…
RKSimon Apr 17, 2024
da04e4a
[InstCombine] Use `auto *` instead of `auto` in `visitSIToFP`; NFC
goldsteinn Apr 17, 2024
d423d80
[libc++][pstl] Promote CPU backends to top-level backends (#88968)
ldionne Apr 17, 2024
8d49ce1
[GlobalISel][AArch64] Add LLRINT support (#88702)
davemgreen Apr 17, 2024
2c22a0c
[InstCombine] Add test case for turning sub into xor using dominating…
topperc Apr 12, 2024
421a8c5
[InstCombine] Add phase ordering test for #88239. NFC
topperc Apr 17, 2024
ed741ff
[github] Add ClangIR to new-prs-labeler.yml (#86088)
lanza Apr 17, 2024
c02ed29
[CostModel][X86] Recognise vector rotation by uniform constant patterns
RKSimon Apr 17, 2024
58a08e1
[RISCV] Add coverage for strength reduction of mul by small negative …
preames Apr 17, 2024
cc82f12
[AArch64] Update latencies for Cortex-A510 scheduling model (#87293)
UsmanNadeem Apr 17, 2024
4572a2d
[AArch64] Add some test cases for LD2/LD3/LD4 shuffles. NFC
davemgreen Apr 17, 2024
5a0942c
[llvm][NVPTX] Don't emit unused var 'temp_param_reg' (NFC) (#89004)
JOE1994 Apr 17, 2024
800f105
[GitHub] Add a new mapping for `offload` subproject (#89118)
shiltian Apr 17, 2024
6f7976c
[libc++][TZDB] Adds sys_info formatter. (#85896)
mordante Apr 17, 2024
b1dc62f
[clang]Treat arguments to builtin type traits as template type argume…
AMP999 Apr 17, 2024
6cea7c4
[X86] Always use 64-bit relocations in no-PIC large code model (#89101)
aeubanks Apr 17, 2024
1460b49
[gn build] Manually port d423d80e560d
aeubanks Apr 17, 2024
db2f64e
AMDGPU: Fix not handling atomicrmw fadd in exotic address spaces corr…
arsenm Apr 17, 2024
652bcf6
CodeGenPrepare: Add support for llvm.threadlocal.address address-mode…
MatzeB Apr 17, 2024
2583b2e
[flang][NFC] Add missing include for FreeBSD
tblah Apr 17, 2024
d0c51f7
[LiveIns] Improve recomputeLiveIns() (#88951)
redstar Apr 17, 2024
60b90b5
[lldb][DynamicLoader] Fix lldb unable to stop at _dl_debug_state if u…
ZequanWu Apr 17, 2024
e15f47f
[InstCombine] Don't use dominating conditions to transform sub into x…
topperc Apr 17, 2024
f309c88
Revert "[flang][NFC] Add missing include for FreeBSD"
tblah Apr 17, 2024
0cee894
[flang][NFC] Add missing include for FreeBSD
tblah Apr 17, 2024
9435edf
[flang][cuda] Lower DEALLOCATE for device variables (#89091)
clementval Apr 17, 2024
1b87418
[bazel] Improve liblldb building (#89095)
keith Apr 17, 2024
0ab3f16
[RISCV] Add coverage of add (mul X, C), Y oppurtunity using shNadd
preames Apr 17, 2024
678f19f
[Support] Report EISDIR when opening a directory (#79880)
azhan92 Apr 17, 2024
26101e8
[flang][cuda] Avoid crash by exiting the check if assignment is not u…
clementval Apr 17, 2024
823eb1a
[SelectionDAG] Add some validation of (S/U)(ADD/SUB)O_CARRY nodes. (#…
topperc Apr 17, 2024
156ab4d
[Clang][Sema] set declaration invalid earlier to prevent crash in cal…
jcsxky Apr 18, 2024
8888369
Revert "[SLP]Attempt to vectorize long stores, if short one failed."
nikic Apr 18, 2024
748ef7e
[CUDA][HIP] Fix record layout on Windows (#87651)
yxsamliu Apr 18, 2024
097b68f
[RISCV][TTI] Refine the cost of FCmp (#88833)
arcbbb Apr 18, 2024
525d00e
[InstCombine] Fix poison propagation in round up alignment fold
nikic Apr 18, 2024
0ee260e
[PowerPC] `ANDI_rec_1_*` should define CR0 (#89034)
Apr 18, 2024
29ecd6d
[clang-format] Revert breaking stream operators to previous default (…
owenca Apr 18, 2024
b6cc667
[clang-format] Annotate ampamp after new/delete as BinaryOperator (#8…
owenca Apr 18, 2024
f2695a1
[C++20] [Modules] Avoid writing untouched DeclUpdates from GMF in
ChuanqiXu9 Apr 17, 2024
3fbb815
[RISCV] Check that VLMAX is the same when demanding exact VL (#89080)
lukel97 Apr 18, 2024
3e2aad4
[RISCV] Speed up RISCVRegisterInfo::needsFrameBaseReg when frame poin…
topperc Apr 18, 2024
8b37ec1
[libc++][NFC] Add additional tests for begin/end of std::ranges::take…
hawkinsw Apr 18, 2024
808d794
[libc++][NFC] Centralize test for support of == and != in ranges (#78…
hawkinsw Apr 18, 2024
0afc884
[RISCV] Use vnclip for scalable vector saturating truncation. (#88648)
sun-jacobi Apr 18, 2024
3d72c44
[mlir][gpu] Improve `gpu.shuffle` documentation. NFC. (#89168)
kuhar Apr 18, 2024
472b612
[libc++][NFC] Remove unused includes from <__type_traits/remove_cv.h>…
philnik777 Apr 18, 2024
fbca90b
[unittest] Skip W+X MappedMemoryTests on OpenBSD (#89102)
brad0 Apr 18, 2024
3d56ea0
[clang][NFC] Fix FieldDecl::isUnnamedBitfield() capitalization (#89048)
tbaederr Apr 18, 2024
dbece2b
[Docs] Fix FAQ and Lexicon links under design overview (#89027)
boomanaiden154 Apr 18, 2024
dc74c69
[libclc] Provide a more helpful error when tools are missing
frasercrmck Apr 16, 2024
93d5119
[libclc] Clarify option help message
frasercrmck Apr 16, 2024
d0af554
[CI] Fix libclc dependencies
frasercrmck Apr 17, 2024
06f54e7
[libclc] Convert llvm-spirv to imported executable
frasercrmck Apr 16, 2024
0aeeff3
[libclc] Allow building with pre-built tools
frasercrmck Apr 16, 2024
afb3395
Merge from 'sycl' to 'sycl-web'
Apr 18, 2024
a5d2ed2
[VectorCombine] Fix typo in test (NFC)
nikic Apr 18, 2024
5ff44db
[VectorCombine] Fix incorrect intrinsic signature (NFC)
nikic Apr 18, 2024
9099f6f
[clang][Interp] Skip unnamed bit fields in initializers
tbaederr Apr 17, 2024
43eb5e2
[RISCV] Remove unused Predicates for I and E extensions. NFC
topperc Apr 18, 2024
ff3523f
[IR] Drop poison-generating return attributes when necessary (#89138)
andjo403 Apr 18, 2024
562f061
[clang][Interp] Load result of pre-inc/dec operation if necessary
tbaederr Apr 18, 2024
71c0784
Fix the double space and double attribute printing of the final keywo…
vgvassilev Apr 18, 2024
b5aff11
[mlir][tosa] Add folding for TOSA ArgMax operator (#88871)
d-agbv Apr 18, 2024
83cc605
[NFC] [Serialization] Extract logics to write special decls from
ChuanqiXu9 Apr 18, 2024
7ec342b
[C++20] [Modules] [Reduced BMI] Write Special Decl Lazily
ChuanqiXu9 Apr 18, 2024
1baa385
[IR][PatternMatch] Only accept poison in getSplatValue() (#89159)
nikic Apr 18, 2024
30a9679
Merge from 'main' to 'sycl-web' (82 commits)
haonanya1 Apr 18, 2024
8521550
[X86] Use m_APIntAllowPoison instead of m_APIntAllowUndef
nikic Apr 18, 2024
9760b6b
[clang-tidy] Ignore deleted ctor in `bugprone-forwarding-reference-ov…
MikeWeller Apr 18, 2024
da579ad
[clang][dataflow] Refactor `PropagateResultObject()` with a switch st…
martinboehme Apr 18, 2024
fcdb220
[AMDGPU][AtomicOptimizer] Fix DT update for divergent values with Ite…
Pierre-vh Apr 18, 2024
b5f2cec
Revert "[clang][dataflow] Refactor `PropagateResultObject()` with a s…
martinboehme Apr 18, 2024
42348b6
[github] Add myself as default code reviewer (#89099)
grypp Apr 18, 2024
3c721b9
Revert "[lldb] Fix evaluation of expressions with static initializers…
labath Apr 18, 2024
135472b
[X86][test] Added extra cet tests, NFC (#88736)
iagarwa Apr 18, 2024
5d4e072
[C++20] [Modules] [Reduced BMI] Don't eagerly write static entities in
ChuanqiXu9 Apr 18, 2024
6e30d97
[MLIR][NVVM] [NFC] Update Docs for shfl.sync Op (#89044)
durga4github Apr 18, 2024
609ee9f
[clang] Remove unused lambda capture (NFC)
DamonFool Apr 18, 2024
c82f45f
[mlir][nvgpu] Simplify TMA IR generation (#87153)
grypp Apr 18, 2024
3f01182
Merge from 'main' to 'sycl-web' (17 commits)
haonanya1 Apr 18, 2024
03e841c
[lldb] Correct documentation of LLDB_TEST_USER_ARGS (#89042)
DavidSpickett Apr 18, 2024
e7a8dd9
[docs] [C++20] [Modules] Mentioning Module Initializer
ChuanqiXu9 Apr 18, 2024
c674dbc
Revert "[FMV] Remove useless features according the latest ACLE spec.…
DavidSpickett Apr 18, 2024
fd98f80
[clang][Interp] Finish initializing structs from CompoundLiteralExprs
tbaederr Apr 18, 2024
61f4001
[llvm-exegesis] Define SYS_gettid if not available
boomanaiden154 Apr 18, 2024
20325ea
Merge from 'main' to 'sycl-web' (2 commits)
haonanya1 Apr 18, 2024
63d8058
LoopVectorize: guard appending InstsToScalarize; fix bug (#88720)
artagnon Apr 18, 2024
e90bc9c
Constant Fold Logf128 calls (#84501)
MDevereau Apr 18, 2024
e300549
Merge from 'main' to 'sycl-web' (9 commits)
haonanya1 Apr 18, 2024
3e64f8a
[AArch64][CodeGen] Fix illegal register aliasing bug for mops instrs …
nasherm Apr 18, 2024
750de32
[COFF] Rename the COFFShortExport::AliasTarget field. NFC. (#89039)
mstorsjo Apr 18, 2024
d17db60
[LLD] [COFF] Don't create pseudo relocations for discardable sections…
mstorsjo Apr 18, 2024
3da0658
Revert "CompilerRT: Normalize COMPILER_RT_DEFAULT_TARGET_TRIPLE (#888…
DavidSpickett Apr 18, 2024
8d6a9c0
[DWARF] Add support for DW_TAG_template_alias for template aliases (#…
OCHyams Apr 18, 2024
ac39fa7
[MLIR][Mem2Reg][LLVM] Enhance partial load support (#89094)
Dinistro Apr 18, 2024
c26e9bf
Revert "Constant Fold Logf128 calls (#84501)"
MDevereau Apr 18, 2024
9462abd
[SLP]Fix PR89187: fixx assertion check.
alexey-bataev Apr 18, 2024
2a4e61b
[mlir][NFC] Move and improve ownership-based buffer dellocation docs …
matthias-springer Apr 18, 2024
652ae4e
[Clang][Sema] Warn when 'exclude_from_explicit_instantiation' attribu…
sdkrystian Apr 18, 2024
3f0d52b
[mlir][llvm] Clean out f8 types from compatible types list
d0k Apr 18, 2024
0e08bce
[libc++][pstl] Move the CPU algorithm implementations to __pstl (#89109)
ldionne Apr 18, 2024
af7a82f
[NFC] Format code of parseArch() (#89152)
bharadwajy Apr 18, 2024
16b3573
Merge from 'sycl' to 'sycl-web'
Apr 18, 2024
98a34d2
Merge from 'main' to 'sycl-web' (36 commits)
t-demchuk Apr 18, 2024
847f91e
Start moving away from insert-before Instruction pointers (#2498)
svenvh Apr 11, 2024
c5f8977
Add CopyLogical instruction (#2484)
vmaksimo Apr 12, 2024
4023524
Support OpPtrEqual, OpPtrNotEqual and OpPtrDiff to compare pointers (…
vmaksimo Apr 15, 2024
0af095e
Remove tbaa metadata from the test (#2503)
MrSidims Apr 16, 2024
b13dd93
Add CopyLogical instruction (#2484)
vmaksimo Apr 12, 2024
93aaad6
Support OpPtrEqual, OpPtrNotEqual and OpPtrDiff to compare pointers (…
vmaksimo Apr 15, 2024
01ceb0c
Deprecate OpLessOrGreater in favor of OpFOrdNotEqual (#2491)
vmaksimo Apr 16, 2024
c857425
Regularize LLVM code to remove use of non standard integer types in f…
asudarsa Apr 16, 2024
53f348a
Don't call getName() on literal structs. (#2499)
maarquitos14 Apr 16, 2024
7faec01
Fix of ParentIdx mismatch for DebugTypeInheritance in SPIRV.debug.h (…
bwlodarcz Apr 16, 2024
3c370d7
Move the version to supported (#2497)
vmaksimo Apr 16, 2024
a0b316f
Introduce SPIR-V 1.6 version (#2505)
vmaksimo Apr 17, 2024
85394b7
Fix wrong resolution. (#13489)
haonanya1 Apr 19, 2024
0202e2a
Merge branch 'sycl-web' into llvmspirv_pulldown
sys-ce-bb Apr 19, 2024
3c89596
Call updateModeleVersion to enable SPIRV inst version check
sys-ce-bb Apr 19, 2024
d800d17
Disable OpLessOrGreater test until SPIR-V 1.5 is supported
sys-ce-bb Apr 19, 2024
0700759
Fix integration_header.cpp test due to 71c0784d
sys-ce-bb Apr 19, 2024
f27e5de
[CodeGen][arm64e] Add methods and data members to Address, which are …
ahatanak Mar 28, 2024
3ce9126
Reland #86923 with fixes
premanandrao Mar 28, 2024
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2 changes: 1 addition & 1 deletion .ci/generate-buildkite-pipeline-premerge
Original file line number Diff line number Diff line change
Expand Up @@ -108,7 +108,7 @@ function add-dependencies() {
compiler-rt|libc|openmp)
echo clang lld
;;
flang|lldb)
flang|lldb|libclc)
for p in llvm clang; do
echo $p
done
Expand Down
9 changes: 9 additions & 0 deletions .github/new-prs-labeler.yml
Original file line number Diff line number Diff line change
@@ -1,3 +1,9 @@
ClangIR:
- clang/include/clang/CIR/**/*
- clang/lib/CIR/**/*
- clang/tools/cir-*/**/*
- clang/test/CIR/**/*

clang:dataflow:
- clang/include/clang/Analysis/FlowSensitive/**/*
- clang/lib/Analysis/FlowSensitive/**/*
Expand Down Expand Up @@ -938,3 +944,6 @@ openmp:libomptarget:

bazel:
- utils/bazel/**

offload:
- offload/**
4 changes: 4 additions & 0 deletions .github/workflows/pr-code-format.yml
Original file line number Diff line number Diff line change
@@ -1,4 +1,8 @@
name: "Check code formatting"

permissions:
contents: read

on:
pull_request:
branches:
Expand Down
9 changes: 5 additions & 4 deletions bolt/docs/BAT.md
Original file line number Diff line number Diff line change
Expand Up @@ -81,9 +81,10 @@ Hot indices are delta encoded, implicitly starting at zero.
| `FuncHash` | 8b | Function hash for input function | Hot |
| `NumBlocks` | ULEB128 | Number of basic blocks in the original function | Hot |
| `NumSecEntryPoints` | ULEB128 | Number of secondary entry points in the original function | Hot |
| `ColdInputSkew` | ULEB128 | Skew to apply to all input offsets | Cold |
| `NumEntries` | ULEB128 | Number of address translation entries for a function | Both |
| `EqualElems` | ULEB128 | Number of equal offsets in the beginning of a function | Hot |
| `BranchEntries` | Bitmask, `alignTo(EqualElems, 8)` bits | If `EqualElems` is non-zero, bitmask denoting entries with `BRANCHENTRY` bit | Hot |
| `EqualElems` | ULEB128 | Number of equal offsets in the beginning of a function | Both |
| `BranchEntries` | Bitmask, `alignTo(EqualElems, 8)` bits | If `EqualElems` is non-zero, bitmask denoting entries with `BRANCHENTRY` bit | Both |

Function header is followed by *Address Translation Table* with `NumEntries`
total entries, and *Secondary Entry Points* table with `NumSecEntryPoints`
Expand All @@ -99,8 +100,8 @@ entry is encoded. Input offsets implicitly start at zero.
| `BBHash` | Optional, 8b | Basic block hash in input binary | BB |
| `BBIdx` | Optional, Delta, ULEB128 | Basic block index in input binary | BB |

For hot fragments, the table omits the first `EqualElems` input offsets
where the input offset equals output offset.
The table omits the first `EqualElems` input offsets where the input offset
equals output offset.

`BRANCHENTRY` bit denotes whether a given offset pair is a control flow source
(branch or call instruction). If not set, it signifies a control flow target
Expand Down
1 change: 0 additions & 1 deletion bolt/include/bolt/Core/BinaryData.h
Original file line number Diff line number Diff line change
Expand Up @@ -107,7 +107,6 @@ class BinaryData {
std::vector<MCSymbol *> &getSymbols() { return Symbols; }

bool hasName(StringRef Name) const;
bool hasNameRegex(StringRef Name) const;
bool nameStartsWith(StringRef Prefix) const;

bool hasSymbol(const MCSymbol *Symbol) const {
Expand Down
3 changes: 2 additions & 1 deletion bolt/include/bolt/Core/BinaryFunction.h
Original file line number Diff line number Diff line change
Expand Up @@ -1402,7 +1402,8 @@ class BinaryFunction {

/// Return true if the function has CFI instructions
bool hasCFI() const {
return !FrameInstructions.empty() || !CIEFrameInstructions.empty();
return !FrameInstructions.empty() || !CIEFrameInstructions.empty() ||
IsInjected;
}

/// Return unique number associated with the function.
Expand Down
17 changes: 8 additions & 9 deletions bolt/include/bolt/Profile/BoltAddressTranslation.h
Original file line number Diff line number Diff line change
Expand Up @@ -119,11 +119,6 @@ class BoltAddressTranslation {
/// True if a given \p Address is a function with translation table entry.
bool isBATFunction(uint64_t Address) const { return Maps.count(Address); }

/// Returns branch offsets grouped by containing basic block in a given
/// function.
std::unordered_map<uint32_t, std::vector<uint32_t>>
getBFBranches(uint64_t FuncOutputAddress) const;

/// For a given \p Symbol in the output binary and known \p InputOffset
/// return a corresponding pair of parent BinaryFunction and secondary entry
/// point in it.
Expand Down Expand Up @@ -154,9 +149,9 @@ class BoltAddressTranslation {
/// entries in function address translation map.
APInt calculateBranchEntriesBitMask(MapTy &Map, size_t EqualElems);

/// Calculate the number of equal offsets (output = input) in the beginning
/// of the function.
size_t getNumEqualOffsets(const MapTy &Map) const;
/// Calculate the number of equal offsets (output = input - skew) in the
/// beginning of the function.
size_t getNumEqualOffsets(const MapTy &Map, uint32_t Skew) const;

std::map<uint64_t, MapTy> Maps;

Expand Down Expand Up @@ -193,7 +188,7 @@ class BoltAddressTranslation {
EntryTy(unsigned Index, size_t Hash) : Index(Index), Hash(Hash) {}
};

std::unordered_map<uint32_t, EntryTy> Map;
std::map<uint32_t, EntryTy> Map;
const EntryTy &getEntry(uint32_t BBInputOffset) const {
auto It = Map.find(BBInputOffset);
assert(It != Map.end());
Expand All @@ -218,6 +213,10 @@ class BoltAddressTranslation {
}

size_t getNumBasicBlocks() const { return Map.size(); }

auto begin() const { return Map.begin(); }
auto end() const { return Map.end(); }
auto upper_bound(uint32_t Offset) const { return Map.upper_bound(Offset); }
};

/// Map function output address to its hash and basic blocks hash map.
Expand Down
19 changes: 9 additions & 10 deletions bolt/include/bolt/Profile/DataAggregator.h
Original file line number Diff line number Diff line change
Expand Up @@ -225,6 +225,10 @@ class DataAggregator : public DataReader {
/// Aggregation statistics
uint64_t NumInvalidTraces{0};
uint64_t NumLongRangeTraces{0};
/// Specifies how many samples were recorded in cold areas if we are dealing
/// with profiling data collected in a bolted binary. For LBRs, incremented
/// for the source of the branch to avoid counting cold activity twice (one
/// for source and another for destination).
uint64_t NumColdSamples{0};

/// Looks into system PATH for Linux Perf and set up the aggregator to use it
Expand All @@ -245,14 +249,12 @@ class DataAggregator : public DataReader {
/// disassembled BinaryFunctions
BinaryFunction *getBinaryFunctionContainingAddress(uint64_t Address) const;

/// Perform BAT translation for a given \p Func and return the parent
/// BinaryFunction or nullptr.
BinaryFunction *getBATParentFunction(const BinaryFunction &Func) const;

/// Retrieve the location name to be used for samples recorded in \p Func.
/// If doing BAT translation, link cold parts to the hot part names (used by
/// the original binary). \p Count specifies how many samples were recorded
/// at that location, so we can tally total activity in cold areas if we are
/// dealing with profiling data collected in a bolted binary. For LBRs,
/// \p Count should only be used for the source of the branch to avoid
/// counting cold activity twice (one for source and another for destination).
StringRef getLocationName(BinaryFunction &Func, uint64_t Count);
StringRef getLocationName(const BinaryFunction &Func) const;

/// Semantic actions - parser hooks to interpret parsed perf samples
/// Register a sample (non-LBR mode), i.e. a new hit at \p Address
Expand Down Expand Up @@ -467,9 +469,6 @@ class DataAggregator : public DataReader {
std::error_code writeBATYAML(BinaryContext &BC,
StringRef OutputFilename) const;

/// Fixup profile collected on BOLTed binary, namely handle split functions.
void fixupBATProfile(BinaryContext &BC);

/// Filter out binaries based on PID
void filterBinaryMMapInfo();

Expand Down
10 changes: 0 additions & 10 deletions bolt/include/bolt/Rewrite/RewriteInstance.h
Original file line number Diff line number Diff line change
Expand Up @@ -368,13 +368,6 @@ class RewriteInstance {
/// rewritten binary.
void patchBuildID();

/// Return file offset corresponding to a given virtual address.
uint64_t getFileOffsetFor(uint64_t Address) {
assert(Address >= NewTextSegmentAddress &&
"address in not in the new text segment");
return Address - NewTextSegmentAddress + NewTextSegmentOffset;
}

/// Return file offset corresponding to a virtual \p Address.
/// Return 0 if the address has no mapping in the file, including being
/// part of .bss section.
Expand All @@ -398,9 +391,6 @@ class RewriteInstance {
/// Return true if the section holds debug information.
static bool isDebugSection(StringRef SectionName);

/// Return true if the section holds linux kernel symbol information.
static bool isKSymtabSection(StringRef SectionName);

/// Adds Debug section to overwrite.
static void addToDebugSectionsToOverwrite(const char *Section) {
DebugSectionsToOverwrite.emplace_back(Section);
Expand Down
28 changes: 22 additions & 6 deletions bolt/lib/Core/BinaryContext.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -555,6 +555,9 @@ bool BinaryContext::analyzeJumpTable(const uint64_t Address,
const uint64_t NextJTAddress,
JumpTable::AddressesType *EntriesAsAddress,
bool *HasEntryInFragment) const {
// Target address of __builtin_unreachable.
const uint64_t UnreachableAddress = BF.getAddress() + BF.getSize();

// Is one of the targets __builtin_unreachable?
bool HasUnreachable = false;

Expand All @@ -564,9 +567,15 @@ bool BinaryContext::analyzeJumpTable(const uint64_t Address,
// Number of targets other than __builtin_unreachable.
uint64_t NumRealEntries = 0;

auto addEntryAddress = [&](uint64_t EntryAddress) {
if (EntriesAsAddress)
EntriesAsAddress->emplace_back(EntryAddress);
// Size of the jump table without trailing __builtin_unreachable entries.
size_t TrimmedSize = 0;

auto addEntryAddress = [&](uint64_t EntryAddress, bool Unreachable = false) {
if (!EntriesAsAddress)
return;
EntriesAsAddress->emplace_back(EntryAddress);
if (!Unreachable)
TrimmedSize = EntriesAsAddress->size();
};

ErrorOr<const BinarySection &> Section = getSectionForAddress(Address);
Expand Down Expand Up @@ -618,8 +627,8 @@ bool BinaryContext::analyzeJumpTable(const uint64_t Address,
: *getPointerAtAddress(EntryAddress);

// __builtin_unreachable() case.
if (Value == BF.getAddress() + BF.getSize()) {
addEntryAddress(Value);
if (Value == UnreachableAddress) {
addEntryAddress(Value, /*Unreachable*/ true);
HasUnreachable = true;
LLVM_DEBUG(dbgs() << formatv("OK: {0:x} __builtin_unreachable\n", Value));
continue;
Expand Down Expand Up @@ -673,6 +682,13 @@ bool BinaryContext::analyzeJumpTable(const uint64_t Address,
addEntryAddress(Value);
}

// Trim direct/normal jump table to exclude trailing unreachable entries that
// can collide with a function address.
if (Type == JumpTable::JTT_NORMAL && EntriesAsAddress &&
TrimmedSize != EntriesAsAddress->size() &&
getBinaryFunctionAtAddress(UnreachableAddress))
EntriesAsAddress->resize(TrimmedSize);

// It's a jump table if the number of real entries is more than 1, or there's
// one real entry and one or more special targets. If there are only multiple
// special targets, then it's not a jump table.
Expand Down Expand Up @@ -1864,7 +1880,7 @@ MarkerSymType BinaryContext::getMarkerType(const SymbolRef &Symbol) const {
// For aarch64 and riscv, the ABI defines mapping symbols so we identify data
// in the code section (see IHI0056B). $x identifies a symbol starting code or
// the end of a data chunk inside code, $d identifies start of data.
if ((!isAArch64() && !isRISCV()) || ELFSymbolRef(Symbol).getSize())
if (isX86() || ELFSymbolRef(Symbol).getSize())
return MarkerSymType::NONE;

Expected<StringRef> NameOrError = Symbol.getName();
Expand Down
8 changes: 0 additions & 8 deletions bolt/lib/Core/BinaryData.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -55,14 +55,6 @@ bool BinaryData::hasName(StringRef Name) const {
return false;
}

bool BinaryData::hasNameRegex(StringRef NameRegex) const {
Regex MatchName(NameRegex);
for (const MCSymbol *Symbol : Symbols)
if (MatchName.match(Symbol->getName()))
return true;
return false;
}

bool BinaryData::nameStartsWith(StringRef Prefix) const {
for (const MCSymbol *Symbol : Symbols)
if (Symbol->getName().starts_with(Prefix))
Expand Down
2 changes: 1 addition & 1 deletion bolt/lib/Core/BinaryEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -512,7 +512,7 @@ void BinaryEmitter::emitFunctionBody(BinaryFunction &BF, FunctionFragment &FF,

// Emit sized NOPs via MCAsmBackend::writeNopData() interface on x86.
// This is a workaround for invalid NOPs handling by asm/disasm layer.
if (BC.MIB->isNoop(Instr) && BC.isX86()) {
if (BC.isX86() && BC.MIB->isNoop(Instr)) {
if (std::optional<uint32_t> Size = BC.MIB->getSize(Instr)) {
SmallString<15> Code;
raw_svector_ostream VecOS(Code);
Expand Down
22 changes: 13 additions & 9 deletions bolt/lib/Core/Relocation.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1064,21 +1064,19 @@ MCBinaryExpr::Opcode Relocation::getComposeOpcodeFor(uint64_t Type) {
}
}

#define ELF_RELOC(name, value) #name,

void Relocation::print(raw_ostream &OS) const {
static const char *X86RelocNames[] = {
#include "llvm/BinaryFormat/ELFRelocs/x86_64.def"
};
static const char *AArch64RelocNames[] = {
#include "llvm/BinaryFormat/ELFRelocs/AArch64.def"
};
switch (Arch) {
default:
OS << "RType:" << Twine::utohexstr(Type);
break;

case Triple::aarch64:
static const char *const AArch64RelocNames[] = {
#define ELF_RELOC(name, value) #name,
#include "llvm/BinaryFormat/ELFRelocs/AArch64.def"
#undef ELF_RELOC
};
assert(Type < ArrayRef(AArch64RelocNames).size());
OS << AArch64RelocNames[Type];
break;

Expand All @@ -1088,16 +1086,22 @@ void Relocation::print(raw_ostream &OS) const {
switch (Type) {
default:
llvm_unreachable("illegal RISC-V relocation");
#undef ELF_RELOC
#define ELF_RELOC(name, value) \
case value: \
OS << #name; \
break;
#include "llvm/BinaryFormat/ELFRelocs/RISCV.def"
#undef ELF_RELOC
}
break;

case Triple::x86_64:
static const char *const X86RelocNames[] = {
#define ELF_RELOC(name, value) #name,
#include "llvm/BinaryFormat/ELFRelocs/x86_64.def"
#undef ELF_RELOC
};
assert(Type < ArrayRef(X86RelocNames).size());
OS << X86RelocNames[Type];
break;
}
Expand Down
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