SPI: SCLK polarity (CPOL) is inverted

[maxgerhardt]

Wikipedia says

so for CPOL = 0, the SCLK pin should idle LOW before and after a SPI transfer.

However, testing with

#include <Arduino.h>
#include <SPI.h>
static int _sck = 2;
static int _mosi = 3;
static int _miso = 4;
static int _cs = 5;

void setup() {
    SPI.setSCK(_sck);
    SPI.setTX(_mosi);
    SPI.setRX(_miso);
    SPI.setCS(_cs);
    SPI.begin(true /* HW CS */);
}

void loop() {
  SPI.beginTransaction(SPISettings(100000, MSBFIRST, SPI_MODE0));
  uint8_t value = 0xAA;
  SPI.transfer(value);
  SPI.endTransaction();
  delay(100);
}

I see

on GP2, 3, 4 and 5 respectively. This is exactly inverted, it idles HIGH. Wut?

The signal also looks exactly the same when using native Pico-SDK functions:

#include <Arduino.h>
#include <hardware/spi.h>
static int _sck = 2;
static int _mosi = 3;
static int _miso = 4;
static int _cs = 5;
static spi_inst_t* _spi = spi0;

void setup() {
  gpio_set_function(_sck, GPIO_FUNC_SPI);
  gpio_set_function(_mosi, GPIO_FUNC_SPI);
  gpio_set_function(_miso, GPIO_FUNC_SPI);
  gpio_set_function(_cs, GPIO_FUNC_SPI);

  spi_init(_spi, 100000);
  spi_set_format(_spi, 8, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
}

void loop() {
  uint8_t value = 0xAA;
  (void) spi_write_blocking(_spi, &value, sizeof(value));
  delay(100);
}

Note that changing to SPI_CPOL_1 in the above example will make the clock idle low. But no matter what, in my logic analyzer, I always have to select the opposite SPI mode / clock polarity than what I set in the code ot make decodable.

[earlephilhower]

I'm kind of confused here, sorry. Are you saying the SDK is inverted, or this core is? And if it was inverted wouldn't there be serious trouble communicating with a wide array of devices?

The logic for converting from Arduino modes to SDK modes is here:

arduino-pico/libraries/SPI/src/SPI.cpp

Lines 47 to 75 in c4f3617

	inline spi_cpol_t SPIClassRP2040::cpol() {
	switch (_spis.getDataMode()) {
	case SPI_MODE0:
	return SPI_CPOL_0;
	case SPI_MODE1:
	return SPI_CPOL_0;
	case SPI_MODE2:
	return SPI_CPOL_1;
	case SPI_MODE3:
	return SPI_CPOL_1;
	}
	// Error
	return SPI_CPOL_0;
	}
	inline spi_cpha_t SPIClassRP2040::cpha() {
	switch (_spis.getDataMode()) {
	case SPI_MODE0:
	return SPI_CPHA_0;
	case SPI_MODE1:
	return SPI_CPHA_1;
	case SPI_MODE2:
	return SPI_CPHA_0;
	case SPI_MODE3:
	return SPI_CPHA_1;
	}
	// Error
	return SPI_CPHA_0;
	}

Looking at those 2 switches and the Wikipedia article, the values themselves seem to be correct.

The actual values are set in beginTransaction, just as in your SDK code:

arduino-pico/libraries/SPI/src/SPI.cpp

Lines 193 to 194 in c4f3617

	spi_init(_spi, _spis.getClockFreq());
	spi_set_format(_spi, 8, cpol(), cpha(), SPI_MSB_FIRST);

[maxgerhardt]

The conversion of the Arduino core / library from SPI mode to CPOL and CPHA is correct, what I'm saying is that SPI Mode 0 (equates CPOL = 0, CPHA = 0) should have a clock idling LOW (per wikipedia), but is actually idling HIGH on real hardware. It's as if the RP2040 chip has inverted SCLK idle levels for CPOL = 0 / 1.

Both the Arduino core and the Pico-SDK functions exhibit SCLK idle level = HIGH when both are correctly asked for SPI Mode 0 / CPOL=0, CPHA=0, when Wikie says it should be LOW.

[earlephilhower]

Ah, gotcha. Maybe this would be better handled at the Pico-SDK repo or the Raspberry Pi forum?.

Looking at the chip docs, they do show the clock low during idle for CPOL=0 (SPO=0)

and high during idle for CPOL=1: (SPO=1)

The SSPCR0 register has the 2 bits for CPOL/CPHA, and I see nothing else related to clock polarity elsewhere.

[maxgerhardt]

You're right, issue in pico-sdk opened per above.

[earlephilhower]

Closing here, being followed up on (hopefully) in the SDK repo...