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The base RISC-V instruction set lacks conditional instructions (they come in Zicond extension, RVA23 profile). However, the result of non-branch comparisons is stored in a regular general-purpose register which can be fed as argument into standard instructions. For now remove branches which can be rephrased as a simple expression on the 0/1 condition result.

Part of #84834, cc @dotnet/samsung

@github-actions github-actions bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jun 12, 2025
@dotnet-policy-service dotnet-policy-service bot added the community-contribution Indicates that the PR has been added by a community member label Jun 12, 2025
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tomeksowi commented Jun 12, 2025

Diffs are based on 99,118 contexts (13,431 MinOpts, 85,687 FullOpts).

Overall (-10,880 bytes)
Collection Base size (bytes) Diff size (bytes) PerfScore in Diffs
linux.riscv64.Checked.1.mch 64,155,420 -10,880 +0.03%
MinOpts (+0 bytes)
Collection Base size (bytes) Diff size (bytes) PerfScore in Diffs
linux.riscv64.Checked.1.mch 19,614,592 +0 0.00%
FullOpts (-10,880 bytes)
Collection Base size (bytes) Diff size (bytes) PerfScore in Diffs
linux.riscv64.Checked.1.mch 44,540,828 -10,880 +0.04%
Example diffs
linux.riscv64.Checked.1.mch
-20 (-31.25%) : 65700.dasm - System.Buffers.EmptySearchValues`1[short]:IndexOfAnyExcept(System.ReadOnlySpan`1[short]):int:this (FullOpts)
@@ -12,57 +12,44 @@
 ;* V01 arg1         [V01    ] (  0,  0   )  struct (16) zero-ref    multireg-arg ld-addr-op single-def <System.ReadOnlySpan`1[short]>
 ;# V02 OutArgs      [V02    ] (  1,  1   )  struct ( 0) [sp+0x00]   do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;  V03 tmp1         [V03,T01] (  1,  1   )   byref  ->   a1         single-def "field V01._reference (fldOffset=0x0)" P-INDEP
-;  V04 tmp2         [V04,T00] (  2,  2   )     int  ->   a2         single-def "field V01._length (fldOffset=0x8)" P-INDEP
+;  V04 tmp2         [V04,T00] (  2,  1.50)     int  ->   a2         single-def "field V01._length (fldOffset=0x8)" P-INDEP
 ;
 ; Lcl frame size = 0
 Frame info. #outsz=0; #framesz=16; lcl=0
 
-G_M62398_IG01:        ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
+G_M62398_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -16
             sd             fp, 0(sp)
             sd             ra, 8(sp)
             mv             fp, sp
-						;; size=16 bbWeight=1 PerfScore 9.00
-G_M62398_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            sext.w         t6, a2
-            bnez           t6, G_M62398_IG05
-						;; size=8 bbWeight=1 PerfScore 4.00
-G_M62398_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M62398_IG04:        ; bbWeight=0.50, epilog, nogc, extend
-            ld             ra, 8(sp)
-            ld             fp, 0(sp)
-            addi           sp, sp, 16
-            ret						;; size=16 bbWeight=0.50 PerfScore 3.75
-G_M62398_IG05:        ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
-            mv             a0, zero
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M62398_IG06:        ; bbWeight=0.50, epilog, nogc, extend
+						;; size=16 bbWeight=0.50 PerfScore 4.50
+G_M62398_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+            sext.w         a0, a2
+            sltu           a0, zero, a0
+            addi           a0, a0, 0xD1FFAB1E
+						;; size=12 bbWeight=0.50 PerfScore 0.75
+G_M62398_IG03:        ; bbWeight=0.50, epilog, nogc, extend
             ld             ra, 8(sp)
             ld             fp, 0(sp)
             addi           sp, sp, 16
             ret						;; size=16 bbWeight=0.50 PerfScore 3.75
 
-; Total bytes of code 64, prolog size 16, PerfScore 21.00, instruction count 16, allocated bytes for code 64 (MethodHash=d5860c41) for method System.Buffers.EmptySearchValues`1[short]:IndexOfAnyExcept(System.ReadOnlySpan`1[short]):int:this (FullOpts)
+; Total bytes of code 44, prolog size 16, PerfScore 9.00, instruction count 11, allocated bytes for code 44 (MethodHash=d5860c41) for method System.Buffers.EmptySearchValues`1[short]:IndexOfAnyExcept(System.ReadOnlySpan`1[short]):int:this (FullOpts)
 ; ============================================================
 
 Unwind Info:
   >> Start offset   : 0x000000 (not in unwind data)
   >>   End offset   : 0xd1ffab1e (not in unwind data)
   Code Words        : 3
-  Epilog Count      : 2
+  Epilog Count      : 1
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 16 (0x00010) Actual length = 64 (0x000040)
+  Function Length   : 11 (0x0000b) Actual length = 44 (0x00002c)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
   Epilog Start Index         : 1 (0x01)
-  ---- Scope 1
-  Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-  Epilog Start Index         : 1 (0x01)
   ---- Unwind codes ----
     E1          set_fp; move fp, sp
     ---- Epilog start at index 1 ----
-20 (-22.73%) : 70820.dasm - TestConfig:Verify_ServerGC_Env_Enable():int (FullOpts)
@@ -12,58 +12,45 @@
 ; Lcl frame size = 0
 Frame info. #outsz=0; #framesz=16; lcl=0
 
-G_M31137_IG01:        ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
+G_M31137_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -16
             sd             fp, 0(sp)
             sd             ra, 8(sp)
             mv             fp, sp
-						;; size=16 bbWeight=1 PerfScore 9.00
-G_M31137_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=16 bbWeight=0.50 PerfScore 4.50
+G_M31137_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             lui            a0, 0xD1FFAB1E
             addiw          a0, a0, 0xD1FFAB1E
             slli           a0, a0, 12
             addi           a0, a0, 0xD1FFAB1E
             slli           a0, a0, 3
             jalr           ra, 0xD1FFAB1E(a0)		// <unknown method>
-            sext.w         t6, a0
-            beqz           t6, G_M31137_IG05
-						;; size=32 bbWeight=1 PerfScore 12.00
-G_M31137_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M31137_IG04:        ; bbWeight=0.50, epilog, nogc, extend
-            ld             ra, 8(sp)
-            ld             fp, 0(sp)
-            addi           sp, sp, 16
-            ret						;; size=16 bbWeight=0.50 PerfScore 3.75
-G_M31137_IG05:        ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M31137_IG06:        ; bbWeight=0.50, epilog, nogc, extend
+            sext.w         a0, a0
+            sltiu          a0, a0, 1
+            addi           a0, a0, 0xD1FFAB1E
+						;; size=36 bbWeight=0.50 PerfScore 4.75
+G_M31137_IG03:        ; bbWeight=0.50, epilog, nogc, extend
             ld             ra, 8(sp)
             ld             fp, 0(sp)
             addi           sp, sp, 16
             ret						;; size=16 bbWeight=0.50 PerfScore 3.75
 
-; Total bytes of code 88, prolog size 16, PerfScore 29.00, instruction count 18, allocated bytes for code 88 (MethodHash=7db6865e) for method TestConfig:Verify_ServerGC_Env_Enable():int (FullOpts)
+; Total bytes of code 68, prolog size 16, PerfScore 13.00, instruction count 13, allocated bytes for code 68 (MethodHash=7db6865e) for method TestConfig:Verify_ServerGC_Env_Enable():int (FullOpts)
 ; ============================================================
 
 Unwind Info:
   >> Start offset   : 0x000000 (not in unwind data)
   >>   End offset   : 0xd1ffab1e (not in unwind data)
   Code Words        : 3
-  Epilog Count      : 2
+  Epilog Count      : 1
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 22 (0x00016) Actual length = 88 (0x000058)
+  Function Length   : 17 (0x00011) Actual length = 68 (0x000044)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
   Epilog Start Index         : 1 (0x01)
-  ---- Scope 1
-  Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-  Epilog Start Index         : 1 (0x01)
   ---- Unwind codes ----
     E1          set_fp; move fp, sp
     ---- Epilog start at index 1 ----
-20 (-22.73%) : 70821.dasm - TestConfig:Verify_ServerGC_Env_Disable():int (FullOpts)
@@ -12,58 +12,45 @@
 ; Lcl frame size = 0
 Frame info. #outsz=0; #framesz=16; lcl=0
 
-G_M21748_IG01:        ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
+G_M21748_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -16
             sd             fp, 0(sp)
             sd             ra, 8(sp)
             mv             fp, sp
-						;; size=16 bbWeight=1 PerfScore 9.00
-G_M21748_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=16 bbWeight=0.50 PerfScore 4.50
+G_M21748_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             lui            a0, 0xD1FFAB1E
             addiw          a0, a0, 0xD1FFAB1E
             slli           a0, a0, 12
             addi           a0, a0, 0xD1FFAB1E
             slli           a0, a0, 3
             jalr           ra, 0xD1FFAB1E(a0)		// <unknown method>
-            sext.w         t6, a0
-            beqz           t6, G_M21748_IG05
-						;; size=32 bbWeight=1 PerfScore 12.00
-G_M21748_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M21748_IG04:        ; bbWeight=0.50, epilog, nogc, extend
-            ld             ra, 8(sp)
-            ld             fp, 0(sp)
-            addi           sp, sp, 16
-            ret						;; size=16 bbWeight=0.50 PerfScore 3.75
-G_M21748_IG05:        ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M21748_IG06:        ; bbWeight=0.50, epilog, nogc, extend
+            sext.w         a0, a0
+            sltu           a0, zero, a0
+            addi           a0, a0, 0xD1FFAB1E
+						;; size=36 bbWeight=0.50 PerfScore 4.75
+G_M21748_IG03:        ; bbWeight=0.50, epilog, nogc, extend
             ld             ra, 8(sp)
             ld             fp, 0(sp)
             addi           sp, sp, 16
             ret						;; size=16 bbWeight=0.50 PerfScore 3.75
 
-; Total bytes of code 88, prolog size 16, PerfScore 29.00, instruction count 18, allocated bytes for code 88 (MethodHash=2045ab0b) for method TestConfig:Verify_ServerGC_Env_Disable():int (FullOpts)
+; Total bytes of code 68, prolog size 16, PerfScore 13.00, instruction count 13, allocated bytes for code 68 (MethodHash=2045ab0b) for method TestConfig:Verify_ServerGC_Env_Disable():int (FullOpts)
 ; ============================================================
 
 Unwind Info:
   >> Start offset   : 0x000000 (not in unwind data)
   >>   End offset   : 0xd1ffab1e (not in unwind data)
   Code Words        : 3
-  Epilog Count      : 2
+  Epilog Count      : 1
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 22 (0x00016) Actual length = 88 (0x000058)
+  Function Length   : 17 (0x00011) Actual length = 68 (0x000044)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
   Epilog Start Index         : 1 (0x01)
-  ---- Scope 1
-  Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-  Epilog Start Index         : 1 (0x01)
   ---- Unwind codes ----
     E1          set_fp; move fp, sp
     ---- Epilog start at index 1 ----
-20 (-20.00%) : 80246.dasm - Runtime_74774:TestEntryPoint():int (FullOpts)
@@ -15,13 +15,13 @@
 ; Lcl frame size = 0
 Frame info. #outsz=0; #framesz=16; lcl=0
 
-G_M20178_IG01:        ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
+G_M20178_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -16
             sd             fp, 0(sp)
             sd             ra, 8(sp)
             mv             fp, sp
-						;; size=16 bbWeight=1 PerfScore 9.00
-G_M20178_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=16 bbWeight=0.50 PerfScore 4.50
+G_M20178_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             addi           a0, zero, 0xD1FFAB1E
             addi           a1, zero, 0xD1FFAB1E
             lui            t6, 0xD1FFAB1E
@@ -31,45 +31,32 @@ G_M20178_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             slli           t6, t6, 2
             ld             a2, 0xD1FFAB1E(t6)
             jalr           a2		// <unknown method>
-            addi           ra, zero, 0xD1FFAB1E
-            beq            a0, ra, G_M20178_IG05
-						;; size=44 bbWeight=1 PerfScore 15.00
-G_M20178_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M20178_IG04:        ; bbWeight=0.50, epilog, nogc, extend
-            ld             ra, 8(sp)
-            ld             fp, 0(sp)
-            addi           sp, sp, 16
-            ret						;; size=16 bbWeight=0.50 PerfScore 3.75
-G_M20178_IG05:        ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M20178_IG06:        ; bbWeight=0.50, epilog, nogc, extend
+            addi           a0, a0, 0xD1FFAB1E
+            sltu           a0, zero, a0
+            addi           a0, a0, 0xD1FFAB1E
+						;; size=48 bbWeight=0.50 PerfScore 6.25
+G_M20178_IG03:        ; bbWeight=0.50, epilog, nogc, extend
             ld             ra, 8(sp)
             ld             fp, 0(sp)
             addi           sp, sp, 16
             ret						;; size=16 bbWeight=0.50 PerfScore 3.75
 
-; Total bytes of code 100, prolog size 16, PerfScore 32.00, instruction count 21, allocated bytes for code 100 (MethodHash=225bb12d) for method Runtime_74774:TestEntryPoint():int (FullOpts)
+; Total bytes of code 80, prolog size 16, PerfScore 14.50, instruction count 16, allocated bytes for code 80 (MethodHash=225bb12d) for method Runtime_74774:TestEntryPoint():int (FullOpts)
 ; ============================================================
 
 Unwind Info:
   >> Start offset   : 0x000000 (not in unwind data)
   >>   End offset   : 0xd1ffab1e (not in unwind data)
   Code Words        : 3
-  Epilog Count      : 2
+  Epilog Count      : 1
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 25 (0x00019) Actual length = 100 (0x000064)
+  Function Length   : 20 (0x00014) Actual length = 80 (0x000050)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
   Epilog Start Index         : 1 (0x01)
-  ---- Scope 1
-  Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-  Epilog Start Index         : 1 (0x01)
   ---- Unwind codes ----
     E1          set_fp; move fp, sp
     ---- Epilog start at index 1 ----
-20 (-12.50%) : 77702.dasm - Runtime_73951:TestEntryPoint():int (FullOpts)
@@ -14,13 +14,13 @@
 ; Lcl frame size = 0
 Frame info. #outsz=0; #framesz=16; lcl=0
 
-G_M63164_IG01:        ; bbWeight=1, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref, nogc <-- Prolog IG
+G_M63164_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -16
             sd             fp, 0(sp)
             sd             ra, 8(sp)
             mv             fp, sp
-						;; size=16 bbWeight=1 PerfScore 9.00
-G_M63164_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=16 bbWeight=0.50 PerfScore 4.50
+G_M63164_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             lui            a0, 0xD1FFAB1E
             addiw          a0, a0, 0xD1FFAB1E
             slli           a0, a0, 12
@@ -47,45 +47,32 @@ G_M63164_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             addi           t6, t6, 0xD1FFAB1E
             slli           t6, t6, 3
             lhu            a0, 0xD1FFAB1E(t6)
-            sext.w         t6, a0
-            bnez           t6, G_M63164_IG05
-						;; size=104 bbWeight=1 PerfScore 35.00
-G_M63164_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M63164_IG04:        ; bbWeight=0.50, epilog, nogc, extend
-            ld             ra, 8(sp)
-            ld             fp, 0(sp)
-            addi           sp, sp, 16
-            ret						;; size=16 bbWeight=0.50 PerfScore 3.75
-G_M63164_IG05:        ; bbWeight=0.50, gcVars=0000000000000000 {}, gcrefRegs=0000 {}, byrefRegs=0000 {}, gcvars, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M63164_IG06:        ; bbWeight=0.50, epilog, nogc, extend
+            sext.w         a0, a0
+            sltu           a0, zero, a0
+            addi           a0, a0, 0xD1FFAB1E
+						;; size=108 bbWeight=0.50 PerfScore 16.25
+G_M63164_IG03:        ; bbWeight=0.50, epilog, nogc, extend
             ld             ra, 8(sp)
             ld             fp, 0(sp)
             addi           sp, sp, 16
             ret						;; size=16 bbWeight=0.50 PerfScore 3.75
 
-; Total bytes of code 160, prolog size 16, PerfScore 52.00, instruction count 24, allocated bytes for code 160 (MethodHash=75cf0943) for method Runtime_73951:TestEntryPoint():int (FullOpts)
+; Total bytes of code 140, prolog size 16, PerfScore 24.50, instruction count 19, allocated bytes for code 140 (MethodHash=75cf0943) for method Runtime_73951:TestEntryPoint():int (FullOpts)
 ; ============================================================
 
 Unwind Info:
   >> Start offset   : 0x000000 (not in unwind data)
   >>   End offset   : 0xd1ffab1e (not in unwind data)
   Code Words        : 3
-  Epilog Count      : 2
+  Epilog Count      : 1
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 40 (0x00028) Actual length = 160 (0x0000a0)
+  Function Length   : 35 (0x00023) Actual length = 140 (0x00008c)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
   Epilog Start Index         : 1 (0x01)
-  ---- Scope 1
-  Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-  Epilog Start Index         : 1 (0x01)
   ---- Unwind codes ----
     E1          set_fp; move fp, sp
     ---- Epilog start at index 1 ----
-8 (-3.17%) : 68430.dasm - System.Runtime.Intrinsics.Vector64:Any[long](System.Runtime.Intrinsics.Vector64`1[long],long):bool (FullOpts)
@@ -9,31 +9,31 @@
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct ( 8) zero-ref    single-def <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V01 arg1         [V01,T00] (  3,  2.50)    long  ->   s1         single-def
+;  V01 arg1         [V01,T00] (  3,  3   )    long  ->   s1         single-def
 ;# V02 OutArgs      [V02    ] (  1,  1   )  struct ( 0) [sp+0x00]   do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V03 tmp1         [V03    ] (  0,  0   )  struct ( 8) zero-ref    "spilled call-like call argument" <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V04 tmp2         [V04    ] (  2,  1   )  struct ( 8) [fp-0x08]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[long]>
+;  V04 tmp2         [V04    ] (  2,  2   )  struct ( 8) [fp-0x08]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[long]>
 ;* V05 tmp3         [V05,T05] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
 ;* V06 tmp4         [V06,T06] (  0,  0   )     int  ->  zero-ref   
-;  V07 tmp5         [V07,T02] (  3,  2   )   ubyte  ->   a0         "Inline return value spill temp"
+;  V07 tmp5         [V07,T03] (  2,  2   )   ubyte  ->   a0         "Inline return value spill temp"
 ;* V08 tmp6         [V08,T07] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;  V09 tmp7         [V09    ] (  2,  2   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V10 tmp8         [V10    ] (  2,  2   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V11 tmp9         [V11,T03] (  2,  2   )    long  ->   s1         "impAppendStmt"
+;  V09 tmp7         [V09    ] (  2,  4   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
+;  V10 tmp8         [V10    ] (  2,  4   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
+;  V11 tmp9         [V11,T01] (  2,  4   )    long  ->   s1         "impAppendStmt"
 ;* V12 tmp10        [V12,T08] (  0,  0   )     int  ->  zero-ref   
 ;* V13 tmp11        [V13,T09] (  0,  0   )     int  ->  zero-ref   
 ;* V14 tmp12        [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
 ;* V15 tmp13        [V15    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
-;  V16 tmp14        [V16,T01] (  2,  1.50)    long  ->   s2         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
-;  V17 tmp15        [V17,T04] (  2,  1   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
-;  V18 tmp16        [V18    ] (  2,  1   )    long  ->  [fp-0x08]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
-;  V19 tmp17        [V19    ] (  2,  1.50)    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
-;  V20 tmp18        [V20    ] (  2,  1.50)    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
+;  V16 tmp14        [V16,T02] (  2,  2   )    long  ->   s2         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
+;  V17 tmp15        [V17,T04] (  2,  2   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
+;  V18 tmp16        [V18    ] (  2,  2   )    long  ->  [fp-0x08]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
+;  V19 tmp17        [V19    ] (  2,  3   )    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
+;  V20 tmp18        [V20    ] (  2,  3   )    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
 ;
 ; Lcl frame size = 32
 Frame info. #outsz=0; #framesz=64; lcl=32
 
-G_M41460_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
+G_M41460_IG01:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -64
             sd             fp, 32(sp)
             sd             ra, 40(sp)
@@ -42,8 +42,8 @@ G_M41460_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             addi           fp, sp, 32
             mv             s2, a0
             mv             s1, a1
-						;; size=32 bbWeight=0.50 PerfScore 9.00
-G_M41460_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=32 bbWeight=1 PerfScore 18.00
+G_M41460_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             addi           a0, zero, 0xD1FFAB1E
             lui            a1, 0xD1FFAB1E
             addiw          a1, a1, 0xD1FFAB1E
@@ -89,14 +89,10 @@ G_M41460_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             ld             a2, 0xD1FFAB1E(t6)
             jalr           a2		// <unknown method>
             ld             a0, -24(fp)
-            beq            s1, a0, G_M41460_IG03
-            sext.w         a0, zero
-            j              G_M41460_IG04
-						;; size=192 bbWeight=0.50 PerfScore 35.00
-G_M41460_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M41460_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+            sub            a0, a0, s1
+            sltiu          a0, a0, 1
+						;; size=188 bbWeight=1 PerfScore 65.50
+G_M41460_IG03:        ; bbWeight=1, epilog, nogc, extend
             ld             s2, 56(sp)
             ld             s1, 48(sp)
             ld             ra, 40(sp)
@@ -104,7 +100,7 @@ G_M41460_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
             addi           sp, sp, 64
             ret						;; size=24 bbWeight=1 PerfScore 11.50
 
-; Total bytes of code 252, prolog size 24, PerfScore 55.75, instruction count 39, allocated bytes for code 252 (MethodHash=334a5e0b) for method System.Runtime.Intrinsics.Vector64:Any[long](System.Runtime.Intrinsics.Vector64`1[long],long):bool (FullOpts)
+; Total bytes of code 244, prolog size 24, PerfScore 95.00, instruction count 37, allocated bytes for code 244 (MethodHash=334a5e0b) for method System.Runtime.Intrinsics.Vector64:Any[long](System.Runtime.Intrinsics.Vector64`1[long],long):bool (FullOpts)
 ; ============================================================
 
 Unwind Info:
@@ -115,7 +111,7 @@ Unwind Info:
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 63 (0x0003f) Actual length = 252 (0x0000fc)
+  Function Length   : 61 (0x0003d) Actual length = 244 (0x0000f4)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-8 (-3.17%) : 68422.dasm - System.Runtime.Intrinsics.Vector64:All[long](System.Runtime.Intrinsics.Vector64`1[long],long):bool (FullOpts)
@@ -9,31 +9,31 @@
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct ( 8) zero-ref    single-def <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V01 arg1         [V01,T00] (  3,  2.50)    long  ->   s1         single-def
+;  V01 arg1         [V01,T00] (  3,  3   )    long  ->   s1         single-def
 ;# V02 OutArgs      [V02    ] (  1,  1   )  struct ( 0) [sp+0x00]   do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V03 tmp1         [V03    ] (  0,  0   )  struct ( 8) zero-ref    "spilled call-like call argument" <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V04 tmp2         [V04    ] (  2,  1   )  struct ( 8) [fp-0x08]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[long]>
+;  V04 tmp2         [V04    ] (  2,  2   )  struct ( 8) [fp-0x08]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[long]>
 ;* V05 tmp3         [V05,T05] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
 ;* V06 tmp4         [V06,T06] (  0,  0   )     int  ->  zero-ref   
-;  V07 tmp5         [V07,T02] (  3,  2   )   ubyte  ->   a0         "Inline return value spill temp"
+;  V07 tmp5         [V07,T03] (  2,  2   )   ubyte  ->   a0         "Inline return value spill temp"
 ;* V08 tmp6         [V08,T07] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;  V09 tmp7         [V09    ] (  2,  2   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V10 tmp8         [V10    ] (  2,  2   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
-;  V11 tmp9         [V11,T03] (  2,  2   )    long  ->   s1         "impAppendStmt"
+;  V09 tmp7         [V09    ] (  2,  4   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
+;  V10 tmp8         [V10    ] (  2,  4   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[long]>
+;  V11 tmp9         [V11,T01] (  2,  4   )    long  ->   s1         "impAppendStmt"
 ;* V12 tmp10        [V12,T08] (  0,  0   )     int  ->  zero-ref   
 ;* V13 tmp11        [V13,T09] (  0,  0   )     int  ->  zero-ref   
 ;* V14 tmp12        [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
 ;* V15 tmp13        [V15    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
-;  V16 tmp14        [V16,T01] (  2,  1.50)    long  ->   s2         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
-;  V17 tmp15        [V17,T04] (  2,  1   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
-;  V18 tmp16        [V18    ] (  2,  1   )    long  ->  [fp-0x08]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
-;  V19 tmp17        [V19    ] (  2,  1.50)    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
-;  V20 tmp18        [V20    ] (  2,  1.50)    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
+;  V16 tmp14        [V16,T02] (  2,  2   )    long  ->   s2         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
+;  V17 tmp15        [V17,T04] (  2,  2   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
+;  V18 tmp16        [V18    ] (  2,  2   )    long  ->  [fp-0x08]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
+;  V19 tmp17        [V19    ] (  2,  3   )    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
+;  V20 tmp18        [V20    ] (  2,  3   )    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
 ;
 ; Lcl frame size = 32
 Frame info. #outsz=0; #framesz=64; lcl=32
 
-G_M29091_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
+G_M29091_IG01:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -64
             sd             fp, 32(sp)
             sd             ra, 40(sp)
@@ -42,8 +42,8 @@ G_M29091_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             addi           fp, sp, 32
             mv             s2, a0
             mv             s1, a1
-						;; size=32 bbWeight=0.50 PerfScore 9.00
-G_M29091_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=32 bbWeight=1 PerfScore 18.00
+G_M29091_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             addi           a0, zero, 0xD1FFAB1E
             lui            a1, 0xD1FFAB1E
             addiw          a1, a1, 0xD1FFAB1E
@@ -89,14 +89,10 @@ G_M29091_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             ld             a2, 0xD1FFAB1E(t6)
             jalr           a2		// <unknown method>
             ld             a0, -24(fp)
-            bne            s1, a0, G_M29091_IG03
-            addi           a0, zero, 0xD1FFAB1E
-            j              G_M29091_IG04
-						;; size=192 bbWeight=0.50 PerfScore 35.00
-G_M29091_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            sext.w         a0, zero
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M29091_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+            sub            a0, a0, s1
+            sltiu          a0, a0, 1
+						;; size=188 bbWeight=1 PerfScore 65.50
+G_M29091_IG03:        ; bbWeight=1, epilog, nogc, extend
             ld             s2, 56(sp)
             ld             s1, 48(sp)
             ld             ra, 40(sp)
@@ -104,7 +100,7 @@ G_M29091_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
             addi           sp, sp, 64
             ret						;; size=24 bbWeight=1 PerfScore 11.50
 
-; Total bytes of code 252, prolog size 24, PerfScore 55.75, instruction count 39, allocated bytes for code 252 (MethodHash=a6a98e5c) for method System.Runtime.Intrinsics.Vector64:All[long](System.Runtime.Intrinsics.Vector64`1[long],long):bool (FullOpts)
+; Total bytes of code 244, prolog size 24, PerfScore 95.00, instruction count 37, allocated bytes for code 244 (MethodHash=a6a98e5c) for method System.Runtime.Intrinsics.Vector64:All[long](System.Runtime.Intrinsics.Vector64`1[long],long):bool (FullOpts)
 ; ============================================================
 
 Unwind Info:
@@ -115,7 +111,7 @@ Unwind Info:
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 63 (0x0003f) Actual length = 252 (0x0000fc)
+  Function Length   : 61 (0x0003d) Actual length = 244 (0x0000f4)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-20 (-7.58%) : 68420.dasm - System.Runtime.Intrinsics.Vector64:All[double](System.Runtime.Intrinsics.Vector64`1[double],double):bool (FullOpts)
@@ -9,31 +9,31 @@
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct ( 8) zero-ref    single-def <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V01 arg1         [V01,T08] (  3,  2.50)  double  ->  [fp-0x08]   single-def
+;  V01 arg1         [V01,T08] (  3,  3   )  double  ->  [fp-0x08]   single-def
 ;# V02 OutArgs      [V02    ] (  1,  1   )  struct ( 0) [sp+0x00]   do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V03 tmp1         [V03    ] (  0,  0   )  struct ( 8) zero-ref    "spilled call-like call argument" <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V04 tmp2         [V04    ] (  2,  1   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[double]>
+;  V04 tmp2         [V04    ] (  2,  2   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[double]>
 ;* V05 tmp3         [V05,T03] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
 ;* V06 tmp4         [V06,T04] (  0,  0   )     int  ->  zero-ref   
-;  V07 tmp5         [V07,T01] (  3,  2   )   ubyte  ->   a0         "Inline return value spill temp"
+;  V07 tmp5         [V07,T01] (  2,  2   )   ubyte  ->   a0         "Inline return value spill temp"
 ;* V08 tmp6         [V08,T05] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;  V09 tmp7         [V09    ] (  2,  2   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V10 tmp8         [V10    ] (  2,  2   )  struct ( 8) [fp-0x20]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V11 tmp9         [V11,T09] (  2,  2   )  double  ->  fs6         "impAppendStmt"
+;  V09 tmp7         [V09    ] (  2,  4   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
+;  V10 tmp8         [V10    ] (  2,  4   )  struct ( 8) [fp-0x20]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
+;  V11 tmp9         [V11,T09] (  2,  4   )  double  ->  fs6         "impAppendStmt"
 ;* V12 tmp10        [V12,T06] (  0,  0   )     int  ->  zero-ref   
 ;* V13 tmp11        [V13,T07] (  0,  0   )     int  ->  zero-ref   
 ;* V14 tmp12        [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
 ;* V15 tmp13        [V15    ] (  0,  0   )  double  ->  zero-ref    "Inlining Arg"
-;  V16 tmp14        [V16,T00] (  2,  1.50)    long  ->   s1         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
-;  V17 tmp15        [V17,T02] (  2,  1   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
-;  V18 tmp16        [V18    ] (  2,  1   )    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
-;  V19 tmp17        [V19    ] (  2,  1.50)    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
-;  V20 tmp18        [V20    ] (  2,  1.50)    long  ->  [fp-0x20]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
+;  V16 tmp14        [V16,T00] (  2,  2   )    long  ->   s1         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
+;  V17 tmp15        [V17,T02] (  2,  2   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
+;  V18 tmp16        [V18    ] (  2,  2   )    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
+;  V19 tmp17        [V19    ] (  2,  3   )    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
+;  V20 tmp18        [V20    ] (  2,  3   )    long  ->  [fp-0x20]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
 ;
 ; Lcl frame size = 32
 Frame info. #outsz=0; #framesz=64; lcl=32
 
-G_M38396_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
+G_M38396_IG01:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -64
             sd             fp, 32(sp)
             sd             ra, 40(sp)
@@ -42,8 +42,8 @@ G_M38396_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             addi           fp, sp, 32
             fsd            fa0, -8(fp)
             mv             s1, a0
-						;; size=32 bbWeight=0.50 PerfScore 10.75
-G_M38396_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=32 bbWeight=1 PerfScore 21.50
+G_M38396_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             addi           a0, zero, 0xD1FFAB1E
             lui            a1, 0xD1FFAB1E
             addiw          a1, a1, 0xD1FFAB1E
@@ -91,15 +91,8 @@ G_M38396_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             jalr           a2		// <unknown method>
             fld            ft4, -32(fp)
             feq.d          a0, ft4, fs6
-            sext.w         t6, a0
-            beqz           t6, G_M38396_IG03
-            addi           a0, zero, 0xD1FFAB1E
-            j              G_M38396_IG04
-						;; size=204 bbWeight=0.50 PerfScore 37.75
-G_M38396_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            sext.w         a0, zero
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M38396_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+						;; size=188 bbWeight=1 PerfScore 69.50
+G_M38396_IG03:        ; bbWeight=1, epilog, nogc, extend
             fld            fs6, 56(sp)
             ld             s1, 48(sp)
             ld             ra, 40(sp)
@@ -107,7 +100,7 @@ G_M38396_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
             addi           sp, sp, 64
             ret						;; size=24 bbWeight=1 PerfScore 11.50
 
-; Total bytes of code 264, prolog size 24, PerfScore 60.25, instruction count 42, allocated bytes for code 264 (MethodHash=17136a03) for method System.Runtime.Intrinsics.Vector64:All[double](System.Runtime.Intrinsics.Vector64`1[double],double):bool (FullOpts)
+; Total bytes of code 244, prolog size 24, PerfScore 102.50, instruction count 37, allocated bytes for code 244 (MethodHash=17136a03) for method System.Runtime.Intrinsics.Vector64:All[double](System.Runtime.Intrinsics.Vector64`1[double],double):bool (FullOpts)
 ; ============================================================
 
 Unwind Info:
@@ -118,7 +111,7 @@ Unwind Info:
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 66 (0x00042) Actual length = 264 (0x000108)
+  Function Length   : 61 (0x0003d) Actual length = 244 (0x0000f4)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-24 (-8.96%) : 68428.dasm - System.Runtime.Intrinsics.Vector64:Any[double](System.Runtime.Intrinsics.Vector64`1[double],double):bool (FullOpts)
@@ -9,31 +9,31 @@
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct ( 8) zero-ref    single-def <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V01 arg1         [V01,T08] (  3,  2.50)  double  ->  [fp-0x08]   single-def
+;  V01 arg1         [V01,T08] (  3,  3   )  double  ->  [fp-0x08]   single-def
 ;# V02 OutArgs      [V02    ] (  1,  1   )  struct ( 0) [sp+0x00]   do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V03 tmp1         [V03    ] (  0,  0   )  struct ( 8) zero-ref    "spilled call-like call argument" <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V04 tmp2         [V04    ] (  2,  1   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[double]>
+;  V04 tmp2         [V04    ] (  2,  2   )  struct ( 8) [fp-0x10]   do-not-enreg[XS] addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Runtime.Intrinsics.Vector64`1[double]>
 ;* V05 tmp3         [V05,T03] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
 ;* V06 tmp4         [V06,T04] (  0,  0   )     int  ->  zero-ref   
-;  V07 tmp5         [V07,T01] (  3,  2   )   ubyte  ->   a0         "Inline return value spill temp"
+;  V07 tmp5         [V07,T01] (  2,  2   )   ubyte  ->   a0         "Inline return value spill temp"
 ;* V08 tmp6         [V08,T05] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;  V09 tmp7         [V09    ] (  2,  2   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V10 tmp8         [V10    ] (  2,  2   )  struct ( 8) [fp-0x20]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
-;  V11 tmp9         [V11,T09] (  2,  2   )  double  ->  fs6         "impAppendStmt"
+;  V09 tmp7         [V09    ] (  2,  4   )  struct ( 8) [fp-0x18]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
+;  V10 tmp8         [V10    ] (  2,  4   )  struct ( 8) [fp-0x20]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Runtime.Intrinsics.Vector64`1[double]>
+;  V11 tmp9         [V11,T09] (  2,  4   )  double  ->  fs6         "impAppendStmt"
 ;* V12 tmp10        [V12,T06] (  0,  0   )     int  ->  zero-ref   
 ;* V13 tmp11        [V13,T07] (  0,  0   )     int  ->  zero-ref   
 ;* V14 tmp12        [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
 ;* V15 tmp13        [V15    ] (  0,  0   )  double  ->  zero-ref    "Inlining Arg"
-;  V16 tmp14        [V16,T00] (  2,  1.50)    long  ->   s1         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
-;  V17 tmp15        [V17,T02] (  2,  1   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
-;  V18 tmp16        [V18    ] (  2,  1   )    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
-;  V19 tmp17        [V19    ] (  2,  1.50)    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
-;  V20 tmp18        [V20    ] (  2,  1.50)    long  ->  [fp-0x20]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
+;  V16 tmp14        [V16,T00] (  2,  2   )    long  ->   s1         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
+;  V17 tmp15        [V17,T02] (  2,  2   )    long  ->   a0         "field V03._00 (fldOffset=0x0)" P-INDEP
+;  V18 tmp16        [V18    ] (  2,  2   )    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
+;  V19 tmp17        [V19    ] (  2,  3   )    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V09._00 (fldOffset=0x0)" P-DEP
+;  V20 tmp18        [V20    ] (  2,  3   )    long  ->  [fp-0x20]   do-not-enreg[X] addr-exposed "field V10._00 (fldOffset=0x0)" P-DEP
 ;
 ; Lcl frame size = 32
 Frame info. #outsz=0; #framesz=64; lcl=32
 
-G_M18987_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
+G_M18987_IG01:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -64
             sd             fp, 32(sp)
             sd             ra, 40(sp)
@@ -42,8 +42,8 @@ G_M18987_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             addi           fp, sp, 32
             fsd            fa0, -8(fp)
             mv             s1, a0
-						;; size=32 bbWeight=0.50 PerfScore 10.75
-G_M18987_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=32 bbWeight=1 PerfScore 21.50
+G_M18987_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             addi           a0, zero, 0xD1FFAB1E
             lui            a1, 0xD1FFAB1E
             addiw          a1, a1, 0xD1FFAB1E
@@ -91,16 +91,8 @@ G_M18987_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byr
             jalr           a2		// <unknown method>
             fld            ft4, -32(fp)
             feq.d          a0, ft4, fs6
-            xori           a0, a0, 1
-            sext.w         t6, a0
-            beqz           t6, G_M18987_IG03
-            sext.w         a0, zero
-            j              G_M18987_IG04
-						;; size=208 bbWeight=0.50 PerfScore 38.00
-G_M18987_IG03:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           a0, zero, 0xD1FFAB1E
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M18987_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, epilog, nogc
+						;; size=188 bbWeight=1 PerfScore 69.50
+G_M18987_IG03:        ; bbWeight=1, epilog, nogc, extend
             fld            fs6, 56(sp)
             ld             s1, 48(sp)
             ld             ra, 40(sp)
@@ -108,7 +100,7 @@ G_M18987_IG04:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
             addi           sp, sp, 64
             ret						;; size=24 bbWeight=1 PerfScore 11.50
 
-; Total bytes of code 268, prolog size 24, PerfScore 60.50, instruction count 43, allocated bytes for code 268 (MethodHash=1034b5d4) for method System.Runtime.Intrinsics.Vector64:Any[double](System.Runtime.Intrinsics.Vector64`1[double],double):bool (FullOpts)
+; Total bytes of code 244, prolog size 24, PerfScore 102.50, instruction count 37, allocated bytes for code 244 (MethodHash=1034b5d4) for method System.Runtime.Intrinsics.Vector64:Any[double](System.Runtime.Intrinsics.Vector64`1[double],double):bool (FullOpts)
 ; ============================================================
 
 Unwind Info:
@@ -119,7 +111,7 @@ Unwind Info:
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 67 (0x00043) Actual length = 268 (0x00010c)
+  Function Length   : 61 (0x0003d) Actual length = 244 (0x0000f4)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
-8 (-1.82%) : 64734.dasm - System.Numerics.Vector:LessThan(System.Numerics.Vector`1[long],System.Numerics.Vector`1[long]):System.Numerics.Vector`1[long] (FullOpts)
@@ -12,45 +12,45 @@
 ;* V01 arg1         [V01    ] (  0,  0   )  struct (16) zero-ref    multireg-arg single-def <System.Numerics.Vector`1[long]>
 ;# V02 OutArgs      [V02    ] (  1,  1   )  struct ( 0) [sp+0x00]   do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V03 tmp1         [V03    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.Numerics.Vector`1[long]>
-;  V04 tmp2         [V04    ] (  3,  2.50)  struct (16) [fp-0x10]   do-not-enreg[XSR] multireg-ret addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Numerics.Vector`1[long]>
+;  V04 tmp2         [V04    ] (  3,  3   )  struct (16) [fp-0x10]   do-not-enreg[XSR] multireg-ret addr-exposed ld-addr-op "Inline ldloca(s) first use temp" <System.Numerics.Vector`1[long]>
 ;* V05 tmp3         [V05,T09] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
-;  V06 tmp4         [V06    ] (  4,  4   )  struct (16) [fp-0x20]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Numerics.Vector`1[long]>
-;  V07 tmp5         [V07    ] (  4,  4   )  struct (16) [fp-0x30]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Numerics.Vector`1[long]>
-;  V08 tmp6         [V08,T00] (  4,  4   )    long  ->   s1         "impAppendStmt"
-;  V09 tmp7         [V09,T05] (  6,  3   )    long  ->   s2        
+;  V06 tmp4         [V06    ] (  4,  8   )  struct (16) [fp-0x20]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Numerics.Vector`1[long]>
+;  V07 tmp5         [V07    ] (  4,  8   )  struct (16) [fp-0x30]   do-not-enreg[XS] addr-exposed ld-addr-op "Inlining Arg" <System.Numerics.Vector`1[long]>
+;  V08 tmp6         [V08,T00] (  4,  8   )    long  ->   s1         "impAppendStmt"
+;  V09 tmp7         [V09,T01] (  4,  4   )    long  ->   s2        
 ;* V10 tmp8         [V10    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V11 tmp9         [V11    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
-;* V12 tmp10        [V12,T07] (  0,  0   )     int  ->  zero-ref   
-;* V13 tmp11        [V13,T08] (  0,  0   )     int  ->  zero-ref   
+;* V12 tmp10        [V12,T06] (  0,  0   )     int  ->  zero-ref   
+;* V13 tmp11        [V13,T07] (  0,  0   )     int  ->  zero-ref   
 ;* V14 tmp12        [V14    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
 ;* V15 tmp13        [V15    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V16 tmp14        [V16    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
-;* V17 tmp15        [V17,T06] (  0,  0   )     int  ->  zero-ref   
-;  V18 tmp16        [V18,T01] (  2,  1.50)    long  ->   a0         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
-;  V19 tmp17        [V19,T02] (  2,  1.50)    long  ->   a1         single-def "field V00._01 (fldOffset=0x8)" P-INDEP
-;  V20 tmp18        [V20,T03] (  2,  1.50)    long  ->   a2         single-def "field V01._00 (fldOffset=0x0)" P-INDEP
-;  V21 tmp19        [V21,T04] (  2,  1.50)    long  ->   a3         single-def "field V01._01 (fldOffset=0x8)" P-INDEP
+;* V17 tmp15        [V17,T08] (  0,  0   )     int  ->  zero-ref   
+;  V18 tmp16        [V18,T02] (  2,  2   )    long  ->   a0         single-def "field V00._00 (fldOffset=0x0)" P-INDEP
+;  V19 tmp17        [V19,T03] (  2,  2   )    long  ->   a1         single-def "field V00._01 (fldOffset=0x8)" P-INDEP
+;  V20 tmp18        [V20,T04] (  2,  2   )    long  ->   a2         single-def "field V01._00 (fldOffset=0x0)" P-INDEP
+;  V21 tmp19        [V21,T05] (  2,  2   )    long  ->   a3         single-def "field V01._01 (fldOffset=0x8)" P-INDEP
 ;* V22 tmp20        [V22    ] (  0,  0   )    long  ->  zero-ref    "field V03._00 (fldOffset=0x0)" P-DEP
 ;* V23 tmp21        [V23    ] (  0,  0   )    long  ->  zero-ref    "field V03._01 (fldOffset=0x8)" P-DEP
-;  V24 tmp22        [V24    ] (  3,  2.50)    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
-;  V25 tmp23        [V25    ] (  3,  2.50)    long  ->  [fp-0x08]   do-not-enreg[X] addr-exposed "field V04._01 (fldOffset=0x8)" P-DEP
-;  V26 tmp24        [V26    ] (  3,  2.50)    long  ->  [fp-0x20]   do-not-enreg[X] addr-exposed "field V06._00 (fldOffset=0x0)" P-DEP
-;  V27 tmp25        [V27    ] (  3,  2.50)    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V06._01 (fldOffset=0x8)" P-DEP
-;  V28 tmp26        [V28    ] (  3,  2.50)    long  ->  [fp-0x30]   do-not-enreg[X] addr-exposed "field V07._00 (fldOffset=0x0)" P-DEP
-;  V29 tmp27        [V29    ] (  3,  2.50)    long  ->  [fp-0x28]   do-not-enreg[X] addr-exposed "field V07._01 (fldOffset=0x8)" P-DEP
+;  V24 tmp22        [V24    ] (  3,  3   )    long  ->  [fp-0x10]   do-not-enreg[X] addr-exposed "field V04._00 (fldOffset=0x0)" P-DEP
+;  V25 tmp23        [V25    ] (  3,  3   )    long  ->  [fp-0x08]   do-not-enreg[X] addr-exposed "field V04._01 (fldOffset=0x8)" P-DEP
+;  V26 tmp24        [V26    ] (  3,  5   )    long  ->  [fp-0x20]   do-not-enreg[X] addr-exposed "field V06._00 (fldOffset=0x0)" P-DEP
+;  V27 tmp25        [V27    ] (  3,  5   )    long  ->  [fp-0x18]   do-not-enreg[X] addr-exposed "field V06._01 (fldOffset=0x8)" P-DEP
+;  V28 tmp26        [V28    ] (  3,  5   )    long  ->  [fp-0x30]   do-not-enreg[X] addr-exposed "field V07._00 (fldOffset=0x0)" P-DEP
+;  V29 tmp27        [V29    ] (  3,  5   )    long  ->  [fp-0x28]   do-not-enreg[X] addr-exposed "field V07._01 (fldOffset=0x8)" P-DEP
 ;
 ; Lcl frame size = 48
 Frame info. #outsz=0; #framesz=80; lcl=48
 
-G_M2960_IG01:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
+G_M2960_IG01:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
             addi           sp, sp, -80
             sd             fp, 48(sp)
             sd             ra, 56(sp)
             sd             s1, 64(sp)
             sd             s2, 72(sp)
             addi           fp, sp, 48
-						;; size=24 bbWeight=0.50 PerfScore 8.50
-G_M2960_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+						;; size=24 bbWeight=1 PerfScore 17.00
+G_M2960_IG02:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             sd             a0, -32(fp)
             sd             a1, -24(fp)
             sd             a2, -48(fp)
@@ -83,16 +83,9 @@ G_M2960_IG02:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byre
             ld             a2, 0xD1FFAB1E(t6)
             jalr           a2		// <unknown method>
             ld             a0, -48(fp)
-            bge            s1, a0, G_M2960_IG04
-						;; size=132 bbWeight=0.50 PerfScore 27.25
-G_M2960_IG03:        ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           s2, zero, 0xD1FFAB1E
-            j              G_M2960_IG05
-						;; size=8 bbWeight=0.25 PerfScore 0.50
-G_M2960_IG04:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            mv             s2, zero
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M2960_IG05:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+            slt            a0, s1, a0
+            xori           a0, a0, 1
+            addi           s2, a0, 0xD1FFAB1E
             addi           a0, zero, 0xD1FFAB1E
             lui            a1, 0xD1FFAB1E
             addiw          a1, a1, 0xD1FFAB1E
@@ -135,16 +128,9 @@ G_M2960_IG05:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byre
             ld             a2, 0xD1FFAB1E(t6)
             jalr           a2		// <unknown method>
             ld             a0, -40(fp)
-            bge            s1, a0, G_M2960_IG07
-						;; size=172 bbWeight=0.50 PerfScore 29.00
-G_M2960_IG06:        ; bbWeight=0.25, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            addi           s2, zero, 0xD1FFAB1E
-            j              G_M2960_IG08
-						;; size=8 bbWeight=0.25 PerfScore 0.50
-G_M2960_IG07:        ; bbWeight=0.50, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
-            mv             s2, zero
-						;; size=4 bbWeight=0.50 PerfScore 0.25
-G_M2960_IG08:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
+            slt            a0, s1, a0
+            xori           a0, a0, 1
+            addi           s2, a0, 0xD1FFAB1E
             addi           a0, zero, 0xD1FFAB1E
             lui            a1, 0xD1FFAB1E
             addiw          a1, a1, 0xD1FFAB1E
@@ -161,8 +147,8 @@ G_M2960_IG08:        ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
             sd             s2, -8(fp)
             ld             a0, -16(fp)
             ld             a1, -8(fp)
-						;; size=64 bbWeight=1 PerfScore 23.50
-G_M2960_IG09:        ; bbWeight=1, epilog, nogc, extend
+						;; size=384 bbWeight=1 PerfScore 132.00
+G_M2960_IG03:        ; bbWeight=1, epilog, nogc, extend
             ld             s2, 72(sp)
             ld             s1, 64(sp)
             ld             ra, 56(sp)
@@ -170,7 +156,7 @@ G_M2960_IG09:        ; bbWeight=1, epilog, nogc, extend
             addi           sp, sp, 80
             ret						;; size=24 bbWeight=1 PerfScore 11.50
 
-; Total bytes of code 440, prolog size 24, PerfScore 101.25, instruction count 62, allocated bytes for code 440 (MethodHash=d88bf46f) for method System.Numerics.Vector:LessThan(System.Numerics.Vector`1[long],System.Numerics.Vector`1[long]):System.Numerics.Vector`1[long] (FullOpts)
+; Total bytes of code 432, prolog size 24, PerfScore 160.50, instruction count 60, allocated bytes for code 432 (MethodHash=d88bf46f) for method System.Numerics.Vector:LessThan(System.Numerics.Vector`1[long],System.Numerics.Vector`1[long]):System.Numerics.Vector`1[long] (FullOpts)
 ; ============================================================
 
 Unwind Info:
@@ -181,7 +167,7 @@ Unwind Info:
   E bit             : 0
   X bit             : 0
   Vers              : 0
-  Function Length   : 110 (0x0006e) Actual length = 440 (0x0001b8)
+  Function Length   : 108 (0x0006c) Actual length = 432 (0x0001b0)
   ---- Epilog scopes ----
   ---- Scope 0
   Epilog Start Offset        : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e)
Details

Size improvements/regressions per collection

Collection Contexts with diffs Improvements Regressions Same size Improvements (bytes) Regressions (bytes)
linux.riscv64.Checked.1.mch 7,456 334 1 7,121 -10,884 +4

PerfScore improvements/regressions per collection

Collection Contexts with diffs Improvements Regressions Same PerfScore Improvements (PerfScore) Regressions (PerfScore) PerfScore Overall in FullOpts
linux.riscv64.Checked.1.mch 7,456 283 52 7,121 -6.52% +51.67% +0.0030%

Context information

Collection Diffed contexts MinOpts FullOpts Missed, base Missed, diff
linux.riscv64.Checked.1.mch 99,118 13,431 85,687 0 (0.00%) 0 (0.00%)

jit-analyze output

Looks like the PerfScore regressions (see last 5 examples) are a consequence of weighing BBs; when the branch is removed, the weight of some BBs (even not part of the branch) is doubled inflating the PerfScore.

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risc-vv commented Jun 13, 2025

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 599
      killed: 28
------------------------
 TOTAL tests: 9712
VIRTUAL time: 35h 14min 50s 683ms
   REAL time: 35min 59s 316ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 599
      killed: 28
------------------------
 TOTAL tests: 9713
VIRTUAL time: 10h 58min 19s 810ms
   REAL time: 45min 5s 423ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-QEMU: 256190 / 257250 (99.59%)
=======================
      passed: 256190
      failed: 1054
     skipped: 38
      killed: 6
------------------------
 TOTAL tests: 257288
VIRTUAL time: 29h 28min 18s 550ms
   REAL time: 1h 2min 6s 732ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-VF2: 271717 / 273437 (99.37%)
=======================
      passed: 271717
      failed: 1709
     skipped: 38
      killed: 11
------------------------
 TOTAL tests: 273475
VIRTUAL time: 19h 18min 5s 328ms
   REAL time: 2h 7min 13s 527ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: c5f03e80433aa4419da98037698a835c8c629b7a
CI: ad349d0f0dd61055dacdfc98d8ad42963a159890
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

@JulieLeeMSFT JulieLeeMSFT requested a review from jakobbotsch July 7, 2025 17:11
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@jakobbotsch PTAL.

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risc-vv commented Jul 10, 2025

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 23min 14s 890ms
   REAL time: 38min 11s 416ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9711
VIRTUAL time: 11h 23min 29s 662ms
   REAL time: 46min 13s 655ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: 34b1f0ae93c96ffdca5836bab95dcce79d3305f1
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

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risc-vv commented Jul 10, 2025

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 24min 58s 437ms
   REAL time: 38min 13s 592ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-VF2: 498489 / 500235 (99.65%)
=======================
      passed: 498489
      failed: 1734
     skipped: 39
      killed: 12
------------------------
 TOTAL tests: 500274
VIRTUAL time: 23h 8min 47s 40ms
   REAL time: 2h 17min 10s 888ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9711
VIRTUAL time: 11h 13min 22s 196ms
   REAL time: 45min 36s 349ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: ca5df291ee83a485c4c84350a1d532c0a33b743b
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

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risc-vv commented Jul 10, 2025

RISC-V Release-FX-QEMU: 274485 / 275565 (99.61%)
=======================
      passed: 274485
      failed: 1070
     skipped: 39
      killed: 10
------------------------
 TOTAL tests: 275604
VIRTUAL time: 32h 59min 8s 418ms
   REAL time: 1h 10min 53s 672ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 28min 27s 758ms
   REAL time: 38min 15s 869ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: ca5df291ee83a485c4c84350a1d532c0a33b743b
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

@risc-vv
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risc-vv commented Jul 11, 2025

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 27min 55s 508ms
   REAL time: 38min 13s 269ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9711
VIRTUAL time: 11h 11min 25s 658ms
   REAL time: 45min 27s 543ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-QEMU: 281172 / 282248 (99.62%)
=======================
      passed: 281172
      failed: 1070
     skipped: 39
      killed: 6
------------------------
 TOTAL tests: 282287
VIRTUAL time: 30h 36min 58s 660ms
   REAL time: 1h 12min 13s 990ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-VF2: 307760 / 309509 (99.43%)
=======================
      passed: 307760
      failed: 1740
     skipped: 39
      killed: 9
------------------------
 TOTAL tests: 309548
VIRTUAL time: 22h 47min 52s 809ms
   REAL time: 2h 15min 50s 778ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: 4de69b6f4f7fa11253e7aea99c9ad78cd51bb4b1
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

@tomeksowi tomeksowi requested a review from jakobbotsch July 11, 2025 11:32
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risc-vv commented Jul 11, 2025

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 30min 28s 415ms
   REAL time: 38min 17s 897ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9711
VIRTUAL time: 11h 5min 51s 103ms
   REAL time: 45min 13s 673ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-QEMU: 248864 / 249942 (99.57%)
=======================
      passed: 248864
      failed: 1069
     skipped: 39
      killed: 9
------------------------
 TOTAL tests: 249981
VIRTUAL time: 32h 22min 32s 26ms
   REAL time: 1h 10min 50s 142ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-VF2: 307660 / 309413 (99.43%)
=======================
      passed: 307660
      failed: 1743
     skipped: 39
      killed: 10
------------------------
 TOTAL tests: 309452
VIRTUAL time: 23h 9min 0s 644ms
   REAL time: 2h 17min 2s 629ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: 749b3c560733cb93232b7f84522cf7d434da7a44
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

@risc-vv
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risc-vv commented Jul 11, 2025

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9711
VIRTUAL time: 10h 59min 32s 662ms
   REAL time: 44min 39s 195ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 43min 41s 267ms
   REAL time: 38min 26s 885ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: 57c7de84a0a514b04ddf18c7157d665f4e2d3512
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

@risc-vv
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risc-vv commented Jul 11, 2025

RISC-V Release-CLR-VF2: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 11h 9min 5s 675ms
   REAL time: 45min 18s 280ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-QEMU: 275639 / 276719 (99.61%)
=======================
      passed: 275639
      failed: 1073
     skipped: 39
      killed: 7
------------------------
 TOTAL tests: 276758
VIRTUAL time: 32h 33min 17s 212ms
   REAL time: 1h 12min 2s 181ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 44min 24s 749ms
   REAL time: 40min 13s 899ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: 57c7de84a0a514b04ddf18c7157d665f4e2d3512
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

@risc-vv
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risc-vv commented Jul 11, 2025

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9711
VIRTUAL time: 11h 18min 11s 569ms
   REAL time: 45min 51s 456ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-QEMU: 277592 / 278689 (99.61%)
=======================
      passed: 277592
      failed: 1088
     skipped: 39
      killed: 9
------------------------
 TOTAL tests: 278728
VIRTUAL time: 32h 13min 3s 552ms
   REAL time: 1h 10min 20s 391ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-VF2: 309102 / 310844 (99.44%)
=======================
      passed: 309102
      failed: 1732
     skipped: 39
      killed: 10
------------------------
 TOTAL tests: 310883
VIRTUAL time: 22h 31min 12s 838ms
   REAL time: 2h 15min 21s 644ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: 57c7de84a0a514b04ddf18c7157d665f4e2d3512
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

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risc-vv commented Jul 11, 2025

RISC-V Release-CLR-VF2: 9084 / 9114 (99.67%)
=======================
      passed: 9084
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9711
VIRTUAL time: 12h 1min 14s 607ms
   REAL time: 48min 32s 62ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-QEMU: 284048 / 285123 (99.62%)
=======================
      passed: 284048
      failed: 1068
     skipped: 39
      killed: 7
------------------------
 TOTAL tests: 285162
VIRTUAL time: 31h 51min 29s 296ms
   REAL time: 1h 11min 39s 388ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-FX-VF2: 300179 / 301919 (99.42%)
=======================
      passed: 300179
      failed: 1730
     skipped: 39
      killed: 10
------------------------
 TOTAL tests: 301958
VIRTUAL time: 21h 26min 43s 419ms
   REAL time: 2h 17min 56s 461ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

RISC-V Release-CLR-QEMU: 9083 / 9113 (99.67%)
=======================
      passed: 9083
      failed: 2
     skipped: 597
      killed: 28
------------------------
 TOTAL tests: 9710
VIRTUAL time: 37h 25min 53s 728ms
   REAL time: 38min 8s 919ms
=======================

report.xml, report.md, failures.xml, testclr_details.tar.zst

Build information and commands

GIT: 57c7de84a0a514b04ddf18c7157d665f4e2d3512
CI: d6c9c1ab3a7411819463edc05ded301e89ba586a
REPO: dotnet/runtime
BRANCH: main
CONFIG: Release
LIB_CONFIG: Release

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am11 commented Jul 12, 2025

The base RISC-V instruction set lacks conditional instructions (they come in Zicond extension, RVA23 profile)

Yup, it is supported by kernel v6.8: https://lf-rise.atlassian.net/wiki/spaces/HOME/pages/8587962/RVA23+Profile. However, on bianbu with kernel 6.6, it's probably patched because RISCV_HWPROBE_EXT_ZICOND is detected correctly. We can detect it in src/native/minipal/cpufeatures.c if needed.

@jakobbotsch jakobbotsch merged commit ab716ca into dotnet:main Jul 15, 2025
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