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Arm64/SVE: Implemented ConvertToInt32 and ConvertToUInt32 for double #103436

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Merged
merged 12 commits into from
Jun 15, 2024
Merged

Arm64/SVE: Implemented ConvertToInt32 and ConvertToUInt32 for double #103436

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c738b77
Added ConverToInt32 and ConvertToUInt32 for float inputs.
ebepho Jun 5, 2024
35d39d9
Added flags to handle only low predicate registers.
ebepho Jun 5, 2024
7a781e1
Fixed merge conflicts.
ebepho Jun 5, 2024
1378d60
Fix whitespace
ebepho Jun 5, 2024
10c7a15
Remove special codegen flag
ebepho Jun 7, 2024
8004868
Added new test template for operations with different return types.
ebepho Jun 10, 2024
af7ccd4
Merge branch 'main' into ConvertToInt32
ebepho Jun 10, 2024
8cb76da
Add new test template.
ebepho Jun 11, 2024
abe25fc
Added api for ConvertToInt32 and ConvertToUInt 32 for double.
ebepho Jun 13, 2024
0f51f38
fix merge conflicts.
ebepho Jun 13, 2024
7fabb91
Merge branch 'dotnet:main' into main
ebepho Jun 14, 2024
1a05f44
all merge conflicts fixed.
ebepho Jun 14, 2024
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5 changes: 5 additions & 0 deletions src/coreclr/jit/hwintrinsiclistarm64sve.h
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Original file line number Diff line number Diff line change
Expand Up @@ -32,8 +32,13 @@ HARDWARE_INTRINSIC(Sve, Compute16BitAddresses,
HARDWARE_INTRINSIC(Sve, Compute32BitAddresses, -1, 2, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_adr, INS_invalid, INS_sve_adr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen)
HARDWARE_INTRINSIC(Sve, Compute64BitAddresses, -1, 2, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_adr, INS_invalid, INS_sve_adr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen)
HARDWARE_INTRINSIC(Sve, ConditionalSelect, -1, 3, true, {INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ExplicitMaskedOperation|HW_Flag_SupportsContainment)
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you need to resolve the merge conflicts.

HARDWARE_INTRINSIC(Sve, ConvertToInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToUInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
=======
HARDWARE_INTRINSIC(Sve, ConvertToInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_sve_fcvtzs}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToUInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_sve_fcvtzu}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
>>>>>>> ConvertToInt32
HARDWARE_INTRINSIC(Sve, Count16BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cnth, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
HARDWARE_INTRINSIC(Sve, Count32BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntw, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
HARDWARE_INTRINSIC(Sve, Count64BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cntd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
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18 changes: 18 additions & 0 deletions ...ries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.PlatformNotSupported.cs
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Expand Up @@ -850,6 +850,15 @@ internal Arm64() { }

/// ConvertToInt32 : Floating-point convert

/// <summary>
/// svint32_t svcvt_s32[_f64]_m(svint32_t inactive, svbool_t pg, svfloat64_t op)
/// FCVTZS Ztied.S, Pg/M, Zop.D
/// svint32_t svcvt_s32[_f64]_x(svbool_t pg, svfloat64_t op)
/// FCVTZS Ztied.S, Pg/M, Ztied.D
/// svint32_t svcvt_s32[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<int> ConvertToInt32(Vector<double> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svint32_t svcvt_s32[_f32]_m(svint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZS Ztied.S, Pg/M, Zop.S
Expand All @@ -862,6 +871,15 @@ internal Arm64() { }

/// ConvertToUInt32 : Floating-point convert

/// <summary>
/// svuint32_t svcvt_u32[_f64]_m(svuint32_t inactive, svbool_t pg, svfloat64_t op)
/// FCVTZU Ztied.S, Pg/M, Zop.D
/// svuint32_t svcvt_u32[_f64]_x(svbool_t pg, svfloat64_t op)
/// FCVTZU Ztied.S, Pg/M, Ztied.D
/// svuint32_t svcvt_u32[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<uint> ConvertToUInt32(Vector<double> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svuint32_t svcvt_u32[_f32]_m(svuint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZU Ztied.S, Pg/M, Zop.S
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18 changes: 18 additions & 0 deletions src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs
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Expand Up @@ -907,6 +907,15 @@ internal Arm64() { }

/// ConvertToInt32 : Floating-point convert

/// <summary>
/// svint32_t svcvt_s32[_f64]_m(svint32_t inactive, svbool_t pg, svfloat64_t op)
/// FCVTZS Ztied.S, Pg/M, Zop.D
/// svint32_t svcvt_s32[_f64]_x(svbool_t pg, svfloat64_t op)
/// FCVTZS Ztied.S, Pg/M, Ztied.D
/// svint32_t svcvt_s32[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<int> ConvertToInt32(Vector<double> value) => ConvertToInt32(value);

/// <summary>
/// svint32_t svcvt_s32[_f32]_m(svint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZS Ztied.S, Pg/M, Zop.S
Expand All @@ -919,6 +928,15 @@ internal Arm64() { }

/// ConvertToUInt32 : Floating-point convert

/// <summary>
/// svuint32_t svcvt_u32[_f64]_m(svuint32_t inactive, svbool_t pg, svfloat64_t op)
/// FCVTZU Ztied.S, Pg/M, Zop.D
/// svuint32_t svcvt_u32[_f64]_x(svbool_t pg, svfloat64_t op)
/// FCVTZU Ztied.S, Pg/M, Ztied.D
/// svuint32_t svcvt_u32[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<uint> ConvertToUInt32(Vector<double> value) => ConvertToUInt32(value);

/// <summary>
/// svuint32_t svcvt_u32[_f32]_m(svuint32_t inactive, svbool_t pg, svfloat32_t op)
/// FCVTZU Ztied.S, Pg/M, Zop.S
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2 changes: 2 additions & 0 deletions src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs
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Expand Up @@ -4307,7 +4307,9 @@ internal Arm64() { }
public static System.Numerics.Vector<float> ConditionalSelect(System.Numerics.Vector<float> mask, System.Numerics.Vector<float> left, System.Numerics.Vector<float> right) { throw null; }
public static System.Numerics.Vector<double> ConditionalSelect(System.Numerics.Vector<double> mask, System.Numerics.Vector<double> left, System.Numerics.Vector<double> right) { throw null; }

public static System.Numerics.Vector<int> ConvertToInt32(System.Numerics.Vector<double> value) { throw null; }
public static System.Numerics.Vector<int> ConvertToInt32(System.Numerics.Vector<float> value) { throw null; }
public static System.Numerics.Vector<uint> ConvertToUInt32(System.Numerics.Vector<double> value) { throw null; }
public static System.Numerics.Vector<uint> ConvertToUInt32(System.Numerics.Vector<float> value) { throw null; }

public static ulong Count16BitElements([ConstantExpected] SveMaskPattern pattern = SveMaskPattern.All) { throw null; }
Expand Down
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