ARM64: Sane contract for WriteBarrier helper

[jkotas]

The WriteBarrier helper on contract on ARM64 includes incrementing the target pointer. See dotnet/coreclr#5821

It is very odd contract that we do not have anywhere else. It makes the hottest write barrier one instruction longer for no good reason, and it is not desirable to standardize this contract for ReadyToRun.

[jkotas]

Also, make sure that both Windows and Unix write barrier are in sync ... they are out of sync now.

[jkotas]

Brian stopped by to explain this to me. The JIT depends on the increment in the byref-writebarrier only. The comments should be updated to clarify it.

[sdmaclea]

@jkotas What do you want here?

The increment in JIT_WriteBarrier should have negligible impact on performance for a speculative machine. Especially since there should be no consumer for the written register.

To move the increment to the JIT_ByRefWriteBarrier requires either

• Creating a call frame so the We can blr JIT_CheckedWriteBarrier; add x14, x14, 8;ret lr
• Copy code from JIT_CheckedWriteBarrier & JIT_WriteBarrier into JIT_ByRefWriteBarrier

Are you just asking for the comments to be updated. Something like:
// x14 : Trashed (Actually incremented by 8 to implement JIT_ByRefWriteBarrier contract)

[jkotas]

Yes, updating comments would be nice