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Verilog: fix for output of -> #685

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Merged
merged 1 commit into from
Sep 11, 2024
Merged

Verilog: fix for output of -> #685

merged 1 commit into from
Sep 11, 2024

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kroening
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This repairs the output of the Verilog (not: SVA) implication operator, to read ->, and not |->.

@kroening
Verilog: fix for output of ->
8fe63c3 
This repairs the output of the Verilog (not: SVA) implication operator, to
read ->, and not |->.
@kroening kroening marked this pull request as ready for review September 10, 2024 15:05
@tautschnig tautschnig merged commit 96f8d09 into main Sep 11, 2024
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@tautschnig tautschnig deleted the fixup-verilog-implies branch September 11, 2024 10:00
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