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Verilog: get_width now returns mp_integer #417

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Merged
merged 1 commit into from
Mar 18, 2024
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This avoids checking for overflows when adding up widths.

@kroening kroening force-pushed the get_width_mp_integer branch from c23b15c to 4290106 Compare March 16, 2024 23:38
@kroening kroening marked this pull request as ready for review March 16, 2024 23:53
@kroening kroening changed the title Verilog: get_width now returns mp_integer Verilog: get_widt now returns mp_integer Mar 17, 2024
@kroening kroening changed the title Verilog: get_widt now returns mp_integer Verilog: get_width now returns mp_integer Mar 17, 2024
Comment on lines 2293 to 2302
auto padding = from_integer(
0, unsignedbv_typet{numeric_cast_v<unsigned>(padding_width)});
auto new_type = unsignedbv_typet{
numeric_cast_v<unsigned>(get_width(op0.type()) + padding_width)};
expr.op0() = concatenation_exprt(padding, expr.op0(), new_type);
}

// Part-select expressions are unsigned, even if the
// entire expression is selected!
auto expr_type = unsignedbv_typet((op1 - op2).to_ulong() + 1);
auto expr_type = unsignedbv_typet{numeric_cast_v<unsigned>(op1 - op2 + 1)};
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Here and above: is it really ok to use the platform-dependent unsigned type?

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Changed to std::size_t -- however, I think I really want to change the constructor of the bitvector types to mp_integer. Client-code should not have to deal with this.

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Yes, indeed.

@kroening kroening force-pushed the get_width_mp_integer branch from 4290106 to 35b444e Compare March 18, 2024 14:29
@kroening kroening mentioned this pull request Mar 18, 2024
This avoids checking for overflows when adding up widths.
@kroening kroening force-pushed the get_width_mp_integer branch from 35b444e to 8bfd27f Compare March 18, 2024 15:12
@tautschnig tautschnig merged commit 4306f65 into main Mar 18, 2024
@tautschnig tautschnig deleted the get_width_mp_integer branch March 18, 2024 15:40
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2 participants