Consider adding hardware optimization levels

[pedrocr]

x86_64 has a bunch of possible features but these appear usually together in shipped CPUs. So for convenience consider adding something like this:

https://www.phoronix.com/scan.php?page=news_item&px=LLVM-Clang-12-Microarch-Levels

Where the levels are:

• x86-64: CMOV, CMPXCHG8B, FPU, FXSR, MMX, FXSR, SCE, SSE, SSE2
• x86-64-v2: (close to Nehalem) CMPXCHG16B, LAHF-SAHF, POPCNT, SSE3, SSE4.1, SSE4.2, SSSE3
• x86-64-v3: (close to Haswell) AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE
• x86-64-v4: AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL

This would make picking a reasonable set of features much easier. Ideally this would also exist for ARM and other architectures and there would be a catch all annotation that would just compile to all levels that apply to the architecture. Something like #[multiversion-broad] that would just use all these reasonable levels in whatever architecture is being compiled for.

[calebzulawski]

Great idea--I've seen these a few times and it definitely simplifies things. It may be convenient to provide automatic versions like this as well.

[calebzulawski]

Sorry it's been a while--this has been added to master.

The new API actually allows selecting any target CPU, such as "x86_64/skylake". Currently, x86-64-v3 doesn't work because std::arch lacks detection of MOVBE. I've opened a PR to add that in rust-lang/stdarch#1356.

[calebzulawski]

Another new feature has been added that allows you to specify #[multiversion(targets = "simd)], which automatically selects from all SIMD instruction sets. On x86/x86-64 this corresponds to the microarchitecture levels.

[Barinzaya]

Seems like the lahfsahf target feature also causes issues with this; it's present on v2-v4. It requires a Nightly feature to be enabled (lahfsahf_target_feature), and even then it seems that is_x86_feature_detected doesn't support runtime detection for it and causes a compile error when attempting to use v2-v4 of the x86-64 levels, rendering them entirely unusable.

targets = "simd" is a handy shortcut, but currently doesn't support AVX-512 (requires a Nightly feature, but is functional), and doesn't seem to be customizable at all either. It also excludes other non-SIMD features provided by these levels (e.g. BMI1, potentially useful for tzcnt).

[Sewer56]

@Barinzaya Running across this too. Think it should be extracted to a separate issue? Otherwise it'd just get buried.

[Sewer56]

I forgot to mention, for the time being I'm doing

#[cfg_attr(
    not(feature = "nightly"), 
    multiversion(targets(
        // avx512 only in nightly.
        // x86-64-v3 without lahfsahf
        "x86_64+avx+avx2+bmi1+bmi2+cmpxchg16b+f16c+fma+fxsr+lzcnt+movbe+popcnt+sse+sse2+sse3+sse4.1+sse4.2+ssse3+xsave",
        // x86-64-v2 without lahfsahf
        "x86_64+cmpxchg16b+fxsr+popcnt+sse+sse2+sse3+sse4.1+sse4.2+ssse3",
    ))
)]
#[cfg_attr(
    feature = "nightly",
    multiversion(targets(
        // x86-64-v4 without lahfsahf
        "x86_64+avx+avx2+avx512bw+avx512cd+avx512dq+avx512f+avx512vl+bmi1+bmi2+cmpxchg16b+f16c+fma+fxsr+lzcnt+movbe+popcnt+sse+sse2+sse3+sse4.1+sse4.2+ssse3+xsave",
        // x86-64-v3 without lahfsahf
        "x86_64+avx+avx2+bmi1+bmi2+cmpxchg16b+f16c+fma+fxsr+lzcnt+movbe+popcnt+sse+sse2+sse3+sse4.1+sse4.2+ssse3+xsave",
        // x86-64-v2 without lahfsahf
        "x86_64+cmpxchg16b+fxsr+popcnt+sse+sse2+sse3+sse4.1+sse4.2+ssse3",
    ))
)]

myself, but obviously that's far from ideal 😅