Skip to content

Fix calculation of SPI_MIN_CLOCK_DIVIDER in SPI.h #292

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
cmaglie merged 1 commit into from
Jan 31, 2018
Merged

Fix calculation of SPI_MIN_CLOCK_DIVIDER in SPI.h #292

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 6 additions & 8 deletions libraries/SPI/SPI.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -37,14 +37,12 @@
#define SPI_MODE2 0x03
#define SPI_MODE3 0x01

#if defined(__SAMD21G18A__)
// Even if not specified on the datasheet, the SAMD21G18A MCU
// doesn't operate correctly with clock dividers lower than 4.
// This allows a theoretical maximum SPI clock speed of 12Mhz
#define SPI_MIN_CLOCK_DIVIDER 4
// Other SAMD21xxxxx MCU may be affected as well
#else
#define SPI_MIN_CLOCK_DIVIDER 2
#if defined(ARDUINO_ARCH_SAMD)
// The datasheet specifies a typical SPI SCK period (tSCK) of 42 ns,
// see "Table 36-48. SPI Timing Characteristics and Requirements",
// which translates into a maximum SPI clock of 23.8 MHz.
// Conservatively, the divider is set for a 12 MHz maximum SPI clock.
#define SPI_MIN_CLOCK_DIVIDER (uint8_t)(1 + ((F_CPU - 1) / 12000000))
#endif

class SPISettings {
Expand Down