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test: Disable a bunch of vector behavior tests for hexagon.
Most of the failures are: * llvm/llvm-project#118879 * llvm/llvm-project#134659 But some are also miscompilations leading to wrong results. I'm not going to investigate the latter further until all the backend crashes have been resolved.
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-1
lines changed

5 files changed

+13
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test/behavior.zig

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,11 @@ test {
104104
_ = @import("behavior/union_with_members.zig");
105105
_ = @import("behavior/usingnamespace.zig");
106106
_ = @import("behavior/var_args.zig");
107-
_ = @import("behavior/vector.zig");
107+
// https://github.com/llvm/llvm-project/issues/118879
108+
// https://github.com/llvm/llvm-project/issues/134659
109+
if (!(builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon)) {
110+
_ = @import("behavior/vector.zig");
111+
}
108112
_ = @import("behavior/void.zig");
109113
_ = @import("behavior/while.zig");
110114
_ = @import("behavior/widening.zig");

test/behavior/cast.zig

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -621,6 +621,7 @@ test "@intCast on vector" {
621621
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
622622
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
623623
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
624+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
624625

625626
const S = struct {
626627
fn doTheTest() !void {
@@ -2697,6 +2698,7 @@ test "@intCast vector of signed integer" {
26972698
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
26982699
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
26992700
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
2701+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
27002702

27012703
var x: @Vector(4, i32) = .{ 1, 2, 3, 4 };
27022704
_ = &x;

test/behavior/floatop.zig

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -241,6 +241,7 @@ test "vector cmp f16" {
241241
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
242242
if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
243243
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
244+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
244245

245246
try testCmpVector(f16);
246247
try comptime testCmpVector(f16);
@@ -254,6 +255,7 @@ test "vector cmp f32" {
254255
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
255256
if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
256257
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
258+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
257259

258260
try testCmpVector(f32);
259261
try comptime testCmpVector(f32);
@@ -266,6 +268,7 @@ test "vector cmp f64" {
266268
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
267269
if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
268270
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
271+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
269272

270273
try testCmpVector(f64);
271274
try comptime testCmpVector(f64);
@@ -281,6 +284,7 @@ test "vector cmp f128" {
281284
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
282285
if (builtin.cpu.arch.isArm()) return error.SkipZigTest;
283286
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
287+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
284288

285289
try testCmpVector(f128);
286290
try comptime testCmpVector(f128);

test/behavior/math.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1899,6 +1899,7 @@ test "partially-runtime integer vector division would be illegal if vector eleme
18991899
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
19001900
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
19011901
if (builtin.zig_backend == .stage2_spirv64) return error.SkipZigTest;
1902+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
19021903

19031904
var lhs: @Vector(2, i8) = .{ -128, 5 };
19041905
const rhs: @Vector(2, i8) = .{ 1, -1 };

test/behavior/select.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,7 @@ test "@select compare result" {
7171
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
7272
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
7373
if (builtin.zig_backend == .stage2_x86_64 and builtin.target.ofmt != .elf and builtin.target.ofmt != .macho) return error.SkipZigTest;
74+
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
7475

7576
const S = struct {
7677
fn min(comptime V: type, lhs: V, rhs: V) V {

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