nRF port improvements and pca10056 support

ports/nrf/README.md

@@ -85,7 +85,7 @@ wt51822_s4at         | s110                    | Peripheral             | Manual
 pca10040             | s132                    | Peripheral and Central | [Segger](#segger-targets)
 feather52            | s132                    | Peripheral and Central | [UART DFU](#dfu-targets)
 arduino_primo        | s132                    | Peripheral and Central | [PyOCD](#pyocdopenocd-targets)
-pca10056             |                         |                        | [Segger](#segger-targets)
+pca10056             | s140                    | Peripheral             | [Segger](#segger-targets)
 
 ## Segger Targets
 

ports/nrf/bluetooth_conf.h

@@ -11,7 +11,7 @@
 #define MICROPY_PY_UBLUEPY              (1)
 #define MICROPY_PY_UBLUEPY_PERIPHERAL   (1)
 
-#elif (BLUETOOTH_SD == 132)
+#elif (BLUETOOTH_SD == 132 || BLUETOOTH_SD == 140)
 
 #define MICROPY_PY_BLE                  (1)
 #define MICROPY_PY_BLE_NUS              (0)

ports/nrf/boards/nrf52840_1M_256k.ld

@@ -7,7 +7,8 @@ MEMORY
 {
     FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */
     FLASH_ISR (rx)  : ORIGIN = 0x00000000, LENGTH = 0x001000 /* sector 0, 4 KiB */
-    FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x0FF000 /* 1020 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x0E6000 /* 920 KiB */
+    FLASH_FATFS (r) : ORIGIN = 0x000E7000, LENGTH = 0x019000 /* File system 100 KiB */
     RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 0x040000 /* 256 KiB */
 }
 

ports/nrf/boards/nrf52840_1M_256k_s140_6.0.0-6.alpha.ld

@@ -0,0 +1,28 @@
+/*
+    GNU linker script for NRF52840 w/ s140 6.0.0-6.alpha SoftDevice
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */
+    FLASH_ISR (rx)  : ORIGIN = 0x00025000, LENGTH = 0x001000 /* sector 0, 4 KiB */
+    FLASH_TEXT (rx) : ORIGIN = 0x00026000, LENGTH = 0x09A000 /* 616 KiB */
+    FLASH_FATFS (r) : ORIGIN = 0x000C0000, LENGTH = 0x040000 /* File system 256 KiB */
+    RAM (xrw)       : ORIGIN = 0x20004000, LENGTH = 0x03C000 /* 240 KiB */
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 40K;
+_minimum_heap_size = 0;
+
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20020000; /* tunable */
+
+INCLUDE "boards/common.ld"

ports/nrf/boards/pca10056/board.c

@@ -0,0 +1,85 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+#include <stdbool.h>
+
+#include "nrf.h"
+
+#include "boards/board.h"
+
+volatile uint32_t ticks_ms = 0;
+
+#define HAL_LFCLK_FREQ (32768UL)
+#define HAL_RTC_FREQ   (1024UL)
+#define HAL_RTC_COUNTER_PRESCALER ((HAL_LFCLK_FREQ/HAL_RTC_FREQ)-1)
+
+/* Maximum RTC ticks */
+#define portNRF_RTC_MAXTICKS   ((1U<<24)-1U)
+
+void board_init(void)
+{
+  // 32Khz XTAL
+  NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
+  NRF_CLOCK->TASKS_LFCLKSTART = 1UL;
+
+  // Set up RTC1 as tick timer
+  NVIC_DisableIRQ(RTC1_IRQn);
+  NRF_RTC1->EVTENCLR    = RTC_EVTEN_COMPARE0_Msk;
+  NRF_RTC1->INTENCLR    = RTC_INTENSET_COMPARE0_Msk;
+  NRF_RTC1->TASKS_STOP  = 1;
+  NRF_RTC1->TASKS_CLEAR = 1;
+
+  ticks_ms = 0;
+
+  NRF_RTC1->PRESCALER = HAL_RTC_COUNTER_PRESCALER;
+  NRF_RTC1->INTENSET = RTC_INTENSET_TICK_Msk;
+  NRF_RTC1->TASKS_START = 1;
+  NRF_RTC1->EVTENSET = RTC_EVTEN_OVRFLW_Msk;
+  NVIC_SetPriority(RTC1_IRQn, 0xf); // lowest priority
+  NVIC_EnableIRQ(RTC1_IRQn);
+}
+
+void RTC1_IRQHandler(void)
+{
+  // Clear event
+  NRF_RTC1->EVENTS_TICK = 0;
+  volatile uint32_t dummy = NRF_RTC1->EVENTS_TICK;
+  (void) dummy;
+  //
+  //// Tick correction
+  uint32_t systick_counter = NRF_RTC1->COUNTER;
+  uint32_t diff = (systick_counter - ticks_ms) & portNRF_RTC_MAXTICKS;
+  ticks_ms += diff;
+}
+
+bool board_requests_safe_mode(void) {
+  return false;
+}
+
+void reset_board(void) {
+
+}

ports/nrf/boards/pca10056/mpconfigboard.h

@@ -82,3 +82,6 @@
 #endif
 
 #define HELP_TEXT_BOARD_LED         "1,2,3,4"
+
+#define PORT_HEAP_SIZE                (128*1024)
+#define CIRCUITPY_AUTORELOAD_DELAY_MS 500

ports/nrf/boards/pca10056/mpconfigboard_s140.mk

@@ -0,0 +1,8 @@
+MCU_SERIES = m4
+MCU_VARIANT = nrf52
+MCU_SUB_VARIANT = nrf52840
+SOFTDEV_VERSION ?= 6.0.0-6.alpha
+
+LD_FILE = boards/nrf52840_1M_256k_s140_$(SOFTDEV_VERSION).ld
+
+NRF_DEFINES += -DNRF52840_XXAA

ports/nrf/boards/pca10056/nrf52_hal_conf.h

@@ -1,7 +1,7 @@
 #ifndef NRF52_HAL_CONF_H__
 #define NRF52_HAL_CONF_H__
 
-// #define HAL_UART_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
 #define HAL_SPI_MODULE_ENABLED
 #define HAL_TIME_MODULE_ENABLED
 #define HAL_PWM_MODULE_ENABLED
@@ -11,7 +11,7 @@
 #define HAL_ADCE_MODULE_ENABLED
 #define HAL_TEMP_MODULE_ENABLED
 #define HAL_RNG_MODULE_ENABLED
-#define HAL_UARTE_MODULE_ENABLED
+// #define HAL_UARTE_MODULE_ENABLED
 // #define HAL_SPIE_MODULE_ENABLED
 // #define HAL_TWIE_MODULE_ENABLED
 

ports/nrf/boards/pca10056/pins.c

@@ -0,0 +1,191 @@
+// This file was automatically generated by make-pins.py
+//
+// --af nrf52_af.csv
+// --board boards/pca10056/pins.csv
+// --prefix boards/nrf52_prefix.c
+
+// nrf52_prefix.c becomes the initial portion of the generated pins file.
+
+#include <stdio.h>
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "pin.h"
+
+#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \
+{ \
+    { &pin_af_type }, \
+    .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \
+    .idx = (af_idx), \
+    .fn = AF_FN_ ## af_fn, \
+    .unit = (af_unit), \
+    .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \
+    .af_fn = (af_ptr) \
+}
+
+#define PIN(p_port, p_pin, p_af, p_adc_channel) \
+{ \
+    { &mcu_pin_type }, \
+    .name = MP_QSTR_ ## p_port ## p_pin, \
+    .port = PORT_ ## p_port, \
+    .pin = (p_pin), \
+    .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \
+    /*.pin_mask = (1 << p_pin), */\
+    .af = p_af, \
+    .adc_channel = p_adc_channel,\
+}
+
+#define NO_ADC    0
+
+const pin_obj_t pin_A0 = PIN(A, 0, NULL, 0);
+const pin_obj_t pin_A1 = PIN(A, 1, NULL, 0);
+const pin_obj_t pin_A2 = PIN(A, 2, NULL, SAADC_CH_PSELP_PSELP_AnalogInput0);
+const pin_obj_t pin_A3 = PIN(A, 3, NULL, SAADC_CH_PSELP_PSELP_AnalogInput1);
+const pin_obj_t pin_A4 = PIN(A, 4, NULL, SAADC_CH_PSELP_PSELP_AnalogInput2);
+const pin_obj_t pin_A5 = PIN(A, 5, NULL, SAADC_CH_PSELP_PSELP_AnalogInput3);
+const pin_obj_t pin_A6 = PIN(A, 6, NULL, 0);
+const pin_obj_t pin_A7 = PIN(A, 7, NULL, 0);
+const pin_obj_t pin_A8 = PIN(A, 8, NULL, 0);
+const pin_obj_t pin_A9 = PIN(A, 9, NULL, 0);
+const pin_obj_t pin_A10 = PIN(A, 10, NULL, 0);
+const pin_obj_t pin_A11 = PIN(A, 11, NULL, 0);
+const pin_obj_t pin_A12 = PIN(A, 12, NULL, 0);
+const pin_obj_t pin_A13 = PIN(A, 13, NULL, 0);
+const pin_obj_t pin_A14 = PIN(A, 14, NULL, 0);
+const pin_obj_t pin_A15 = PIN(A, 15, NULL, 0);
+const pin_obj_t pin_A16 = PIN(A, 16, NULL, 0);
+const pin_obj_t pin_A17 = PIN(A, 17, NULL, 0);
+const pin_obj_t pin_A18 = PIN(A, 18, NULL, 0);
+const pin_obj_t pin_A19 = PIN(A, 19, NULL, 0);
+const pin_obj_t pin_A20 = PIN(A, 20, NULL, 0);
+const pin_obj_t pin_A21 = PIN(A, 21, NULL, 0);
+const pin_obj_t pin_A22 = PIN(A, 22, NULL, 0);
+const pin_obj_t pin_A23 = PIN(A, 23, NULL, 0);
+const pin_obj_t pin_A24 = PIN(A, 24, NULL, 0);
+const pin_obj_t pin_A25 = PIN(A, 25, NULL, 0);
+const pin_obj_t pin_A26 = PIN(A, 26, NULL, 0);
+const pin_obj_t pin_A27 = PIN(A, 27, NULL, 0);
+const pin_obj_t pin_A28 = PIN(A, 28, NULL, SAADC_CH_PSELP_PSELP_AnalogInput4);
+const pin_obj_t pin_A29 = PIN(A, 29, NULL, SAADC_CH_PSELP_PSELP_AnalogInput5);
+const pin_obj_t pin_A30 = PIN(A, 30, NULL, SAADC_CH_PSELP_PSELP_AnalogInput6);
+const pin_obj_t pin_A31 = PIN(A, 31, NULL, SAADC_CH_PSELP_PSELP_AnalogInput7);
+const pin_obj_t pin_B0 = PIN(B, 0, NULL, 0);
+const pin_obj_t pin_B1 = PIN(B, 1, NULL, 0);
+const pin_obj_t pin_B2 = PIN(B, 2, NULL, 0);
+const pin_obj_t pin_B3 = PIN(B, 3, NULL, 0);
+const pin_obj_t pin_B4 = PIN(B, 4, NULL, 0);
+const pin_obj_t pin_B5 = PIN(B, 5, NULL, 0);
+const pin_obj_t pin_B6 = PIN(B, 6, NULL, 0);
+const pin_obj_t pin_B7 = PIN(B, 7, NULL, 0);
+const pin_obj_t pin_B8 = PIN(B, 8, NULL, 0);
+const pin_obj_t pin_B9 = PIN(B, 9, NULL, 0);
+const pin_obj_t pin_B10 = PIN(B, 10, NULL, 0);
+const pin_obj_t pin_B11 = PIN(B, 11, NULL, 0);
+const pin_obj_t pin_B12 = PIN(B, 12, NULL, 0);
+const pin_obj_t pin_B13 = PIN(B, 13, NULL, 0);
+const pin_obj_t pin_B14 = PIN(B, 14, NULL, 0);
+const pin_obj_t pin_B15 = PIN(B, 15, NULL, 0);
+
+STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
+  { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_A0) },
+  { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_A1) },
+  { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_A2) },
+  { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_A3) },
+  { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_A4) },
+  { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_A5) },
+  { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_A6) },
+  { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_A7) },
+  { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_A8) },
+  { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_A9) },
+  { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_A10) },
+  { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_A11) },
+  { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_A12) },
+  { MP_ROM_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_A13) },
+  { MP_ROM_QSTR(MP_QSTR_A14), MP_ROM_PTR(&pin_A14) },
+  { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_A15) },
+  { MP_ROM_QSTR(MP_QSTR_A16), MP_ROM_PTR(&pin_A16) },
+  { MP_ROM_QSTR(MP_QSTR_A17), MP_ROM_PTR(&pin_A17) },
+  { MP_ROM_QSTR(MP_QSTR_A18), MP_ROM_PTR(&pin_A18) },
+  { MP_ROM_QSTR(MP_QSTR_A19), MP_ROM_PTR(&pin_A19) },
+  { MP_ROM_QSTR(MP_QSTR_A20), MP_ROM_PTR(&pin_A20) },
+  { MP_ROM_QSTR(MP_QSTR_A21), MP_ROM_PTR(&pin_A21) },
+  { MP_ROM_QSTR(MP_QSTR_A22), MP_ROM_PTR(&pin_A22) },
+  { MP_ROM_QSTR(MP_QSTR_A23), MP_ROM_PTR(&pin_A23) },
+  { MP_ROM_QSTR(MP_QSTR_A24), MP_ROM_PTR(&pin_A24) },
+  { MP_ROM_QSTR(MP_QSTR_A25), MP_ROM_PTR(&pin_A25) },
+  { MP_ROM_QSTR(MP_QSTR_A26), MP_ROM_PTR(&pin_A26) },
+  { MP_ROM_QSTR(MP_QSTR_A27), MP_ROM_PTR(&pin_A27) },
+  { MP_ROM_QSTR(MP_QSTR_A28), MP_ROM_PTR(&pin_A28) },
+  { MP_ROM_QSTR(MP_QSTR_A29), MP_ROM_PTR(&pin_A29) },
+  { MP_ROM_QSTR(MP_QSTR_A30), MP_ROM_PTR(&pin_A30) },
+  { MP_ROM_QSTR(MP_QSTR_A31), MP_ROM_PTR(&pin_A31) },
+  { MP_ROM_QSTR(MP_QSTR_B0), MP_ROM_PTR(&pin_B0) },
+  { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_B1) },
+  { MP_ROM_QSTR(MP_QSTR_B2), MP_ROM_PTR(&pin_B2) },
+  { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_B3) },
+  { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_B4) },
+  { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_B5) },
+  { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_B6) },
+  { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_B7) },
+  { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_B8) },
+  { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_B9) },
+  { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_B10) },
+  { MP_ROM_QSTR(MP_QSTR_B11), MP_ROM_PTR(&pin_B11) },
+  { MP_ROM_QSTR(MP_QSTR_B12), MP_ROM_PTR(&pin_B12) },
+  { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_B13) },
+  { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_B14) },
+  { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_B15) },
+};
+MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
+
+STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
+  { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_A0) },
+  { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_A1) },
+  { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_A2) },
+  { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_A3) },
+  { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_A4) },
+  { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_A5) },
+  { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_A6) },
+  { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_A7) },
+  { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_A8) },
+  { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_A9) },
+  { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_A10) },
+  { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_A11) },
+  { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_A12) },
+  { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_A13) },
+  { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_A14) },
+  { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_A15) },
+  { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_A16) },
+  { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_A17) },
+  { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_A18) },
+  { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_A19) },
+  { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_A20) },
+  { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_A21) },
+  { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_A22) },
+  { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_A23) },
+  { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_A24) },
+  { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_A25) },
+  { MP_ROM_QSTR(MP_QSTR_PA26), MP_ROM_PTR(&pin_A26) },
+  { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_A27) },
+  { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_A28) },
+  { MP_ROM_QSTR(MP_QSTR_PA29), MP_ROM_PTR(&pin_A29) },
+  { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_A30) },
+  { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_A31) },
+  { MP_ROM_QSTR(MP_QSTR_PB0), MP_ROM_PTR(&pin_B0) },
+  { MP_ROM_QSTR(MP_QSTR_PB1), MP_ROM_PTR(&pin_B1) },
+  { MP_ROM_QSTR(MP_QSTR_PB2), MP_ROM_PTR(&pin_B2) },
+  { MP_ROM_QSTR(MP_QSTR_PB3), MP_ROM_PTR(&pin_B3) },
+  { MP_ROM_QSTR(MP_QSTR_PB4), MP_ROM_PTR(&pin_B4) },
+  { MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_B5) },
+  { MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_B6) },
+  { MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_B7) },
+  { MP_ROM_QSTR(MP_QSTR_PB8), MP_ROM_PTR(&pin_B8) },
+  { MP_ROM_QSTR(MP_QSTR_PB9), MP_ROM_PTR(&pin_B9) },
+  { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_B10) },
+  { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_B11) },
+  { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_B12) },
+  { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_B13) },
+  { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_B14) },
+  { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_B15) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);