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6 changes: 6 additions & 0 deletions kernel/power/zscal.S
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@
#define X r8
#define INCX r9
#endif
#define FLAG r11
#endif

#if defined(_AIX) || defined(__APPLE__)
Expand All @@ -61,6 +62,7 @@
#define X r8
#define INCX r9
#endif
#define FLAG r11
#endif

#define FZERO f0
Expand Down Expand Up @@ -94,6 +96,10 @@
fcmpu cr0, FZERO, ALPHA_I
bne- cr0, LL(A1I1)

LDLONG FLAG, 104(SP)
cmpwi cr0, FLAG, 1
beq- cr0, LL(A1I1)

cmpwi cr0, INCX, 2 * SIZE
bne- cr0, LL(A0IN)

Expand Down
2 changes: 1 addition & 1 deletion kernel/power/zscal.c
Original file line number Diff line number Diff line change
Expand Up @@ -136,7 +136,7 @@ int CNAME(BLASLONG n, BLASLONG dummy0, BLASLONG dummy1, FLOAT da_r,FLOAT da_i, F
if ( inc_x <= 0 )
return(0);

if (da_r == ZERO && da_i == ZERO) {
if (da_r == ZERO && da_i == ZERO && dummy2 == 0) {
//clear the vector and return
if (inc_x == 1) {
memset(x, 0, n*COMPSIZE*SIZE);
Expand Down
5 changes: 5 additions & 0 deletions kernel/power/zscal_ppc440.S
Original file line number Diff line number Diff line change
Expand Up @@ -64,6 +64,7 @@
#endif

#define INC1 r11
#define FLAG r12

#define FZERO f0
#define ALPHA_R f1
Expand Down Expand Up @@ -97,6 +98,10 @@
fcmpu cr0, FZERO, ALPHA_I
bne- cr0, LL(A1I1)

lwz FLAG, FRAMESLOT(0)(SP)
cmpwi cr0, FLAG, 1
beq- cr0, LL(A1I1)

LL(A0IN):
srawi. r0, N, 3
mtspr CTR, r0
Expand Down
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